SPI mode 0 maps to the case where we have write on rising and read on
falling clock edge. Fix the OMAP2 McSPI and OMAP1 uWire edge selection
accordingly.
In the uWire case the meaning of the HW flag selecting the read edge
selection must be flipped for correct operation and this is in
contradiction with the OMAP1 specification. Tests were performed on SPI
devices using mode 1 (original uWire protocoll) like the ads7846 to
validate this.
Signed-off-by: Imre Deak <imre.deak@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
else
l &= ~OMAP2_MCSPI_CHCONF_POL;
if (spi->mode & SPI_CPHA)
- l |= OMAP2_MCSPI_CHCONF_PHA;
- else
l &= ~OMAP2_MCSPI_CHCONF_PHA;
+ else
+ l |= OMAP2_MCSPI_CHCONF_PHA;
mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, l);
return 0;
#define CS_CMD (1 << 12)
/* SR1 or SR2 bits */
-#define UWIRE_READ_FALLING_EDGE 0x0000
-#define UWIRE_READ_RISING_EDGE 0x0001
+#define UWIRE_READ_FALLING_EDGE 0x0001
+#define UWIRE_READ_RISING_EDGE 0x0000
#define UWIRE_WRITE_FALLING_EDGE 0x0000
#define UWIRE_WRITE_RISING_EDGE 0x0002
#define UWIRE_CS_ACTIVE_LOW 0x0000
switch (spi->mode & (SPI_CPOL | SPI_CPHA)) {
case SPI_MODE_0:
case SPI_MODE_3:
- flags |= UWIRE_WRITE_FALLING_EDGE | UWIRE_READ_FALLING_EDGE;
+ flags |= UWIRE_WRITE_RISING_EDGE | UWIRE_READ_FALLING_EDGE;
break;
case SPI_MODE_1:
case SPI_MODE_2: