]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
ath9k: Fix bug in deciphering channel flags
authorSujith <Sujith.Manoharan@atheros.com>
Tue, 18 Nov 2008 03:39:54 +0000 (09:09 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 26 Nov 2008 14:47:33 +0000 (09:47 -0500)
CHANNEL_CCK flag is set for all 2 Ghz channels, so IS_CHAN_CCK() would
turn out to be true for all channles in that band.
Use IS_CHAN_B() now, which checks the channel mode and not the channel
flags.

Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath9k/ath9k.h
drivers/net/wireless/ath9k/hw.c

index 6b0e3dd7b2ada2c77daef2ae15a251a67dc7b6ed..5b9bc545e9640ccbee15af9bcf1934c4bfa2bae6 100644 (file)
@@ -476,12 +476,10 @@ struct ath9k_channel {
        (((_c)->channelFlags & CHANNEL_A_HT20) == CHANNEL_A_HT20) || \
        (((_c)->channelFlags & CHANNEL_A_HT40PLUS) == CHANNEL_A_HT40PLUS) || \
        (((_c)->channelFlags & CHANNEL_A_HT40MINUS) == CHANNEL_A_HT40MINUS))
-#define IS_CHAN_B(_c) (((_c)->channelFlags & CHANNEL_B) == CHANNEL_B)
 #define IS_CHAN_G(_c) ((((_c)->channelFlags & (CHANNEL_G)) == CHANNEL_G) || \
        (((_c)->channelFlags & CHANNEL_G_HT20) == CHANNEL_G_HT20) || \
        (((_c)->channelFlags & CHANNEL_G_HT40PLUS) == CHANNEL_G_HT40PLUS) || \
        (((_c)->channelFlags & CHANNEL_G_HT40MINUS) == CHANNEL_G_HT40MINUS))
-#define IS_CHAN_CCK(_c) (((_c)->channelFlags & CHANNEL_CCK) != 0)
 #define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0)
 #define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0)
 #define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0)
@@ -490,6 +488,7 @@ struct ath9k_channel {
 #define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0)
 
 /* These macros check chanmode and not channelFlags */
+#define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B)
 #define IS_CHAN_HT20(_c) (((_c)->chanmode == CHANNEL_A_HT20) ||        \
                          ((_c)->chanmode == CHANNEL_G_HT20))
 #define IS_CHAN_HT40(_c) (((_c)->chanmode == CHANNEL_A_HT40PLUS) ||    \
index eb1445143bcf429d00041acc5ead94359b637053..10f6c08f6eb2530891fee7671fb64a72c327d082 100644 (file)
@@ -86,10 +86,11 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hal *ah, u32 usecs)
 enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah,
                               const struct ath9k_channel *chan)
 {
-       if (IS_CHAN_CCK(chan))
-               return ATH9K_MODE_11A;
+       if (IS_CHAN_B(chan))
+               return ATH9K_MODE_11B;
        if (IS_CHAN_G(chan))
                return ATH9K_MODE_11G;
+
        return ATH9K_MODE_11A;
 }
 
@@ -909,7 +910,7 @@ static void ath9k_hw_init_bb(struct ath_hal *ah,
        u32 synthDelay;
 
        synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
-       if (IS_CHAN_CCK(chan))
+       if (IS_CHAN_B(chan))
                synthDelay = (4 * synthDelay) / 22;
        else
                synthDelay /= 10;
@@ -1647,7 +1648,7 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
        }
 
        if (!IS_CHAN_OFDM(chan) &&
-           !IS_CHAN_CCK(chan) &&
+           !IS_CHAN_B(chan) &&
            !IS_CHAN_HT20(chan) &&
            !IS_CHAN_HT40(chan)) {
                DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
@@ -1711,7 +1712,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
        }
 
        synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
-       if (IS_CHAN_CCK(chan))
+       if (IS_CHAN_B(chan))
                synthDelay = (4 * synthDelay) / 22;
        else
                synthDelay /= 10;