sh: Fix timer-tmu build for SH-3.

With the TMU register definitions being renamed on SH-4, SH-3 ended up
breaking. Update the TSTR define to match the SH-4 convention.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index b2394cf76f491e21012853302efcf401f6bd8f44..4928b08f9d193bf7ff04eb771ff192032d7ada05 100644 (file)
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -29,7 +29,7 @@
 #endif
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
-#define TMU_TSTR       0xa412fe92      /* Byte access */
+#define TMU_012_TSTR   0xa412fe92      /* Byte access */
 
 #define TMU0_TCOR      0xa412fe94      /* Long access */
 #define TMU0_TCNT      0xa412fe98      /* Long access */
@@ -44,7 +44,7 @@
 #define TMU2_TCR       0xa412feb4      /* Word access */
 
 #else
-#define TMU_TSTR       0xfffffe92      /* Byte access */
+#define TMU_012_TSTR   0xfffffe92      /* Byte access */
 
 #define TMU0_TCOR      0xfffffe94      /* Long access */
 #define TMU0_TCNT      0xfffffe98      /* Long access */