*
*/
-#define CIRRUSFB_VERSION "2.0-pre2"
-
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
*
*/
-/* enable debug output? */
-/* #define CIRRUSFB_DEBUG 1 */
-
/* disable runtime assertions? */
/* #define CIRRUSFB_NDEBUG */
-/* debug output */
-#ifdef CIRRUSFB_DEBUG
-#define DPRINTK(fmt, args...) \
- printk(KERN_DEBUG "%s: " fmt, __func__ , ## args)
-#else
-#define DPRINTK(fmt, args...)
-#endif
-
/* debugging assertions */
#ifndef CIRRUSFB_NDEBUG
#define assert(expr) \
.maxclock = {
/* guess */
/* the SD64/P4 have a higher max. videoclock */
- 140000, 140000, 140000, 140000, 140000,
+ 135100, 135100, 85500, 85500, 0
},
.init_sr07 = true,
.init_sr1f = true,
static void bestclock(long freq, int *nom, int *den, int *div);
#ifdef CIRRUSFB_DEBUG
-static void cirrusfb_dump(void);
-static void cirrusfb_dbg_reg_dump(caddr_t regbase);
-static void cirrusfb_dbg_print_regs(caddr_t regbase,
+static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase);
+static void cirrusfb_dbg_print_regs(struct fb_info *info,
+ caddr_t regbase,
enum cirrusfb_dbg_reg_class reg_class, ...);
-static void cirrusfb_dbg_print_byte(const char *name, unsigned char val);
#endif /* CIRRUSFB_DEBUG */
/*** END PROTOTYPES ********************************************************/
/**** BEGIN Hardware specific Routines **************************************/
/* Check if the MCLK is not a better clock source */
-static int cirrusfb_check_mclk(struct cirrusfb_info *cinfo, long freq)
+static int cirrusfb_check_mclk(struct fb_info *info, long freq)
{
+ struct cirrusfb_info *cinfo = info->par;
long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f;
/* Read MCLK value */
mclk = (14318 * mclk) >> 3;
- DPRINTK("Read MCLK of %ld kHz\n", mclk);
+ dev_dbg(info->device, "Read MCLK of %ld kHz\n", mclk);
/* Determine if we should use MCLK instead of VCLK, and if so, what we
* should divide it by to get VCLK
*/
if (abs(freq - mclk) < 250) {
- DPRINTK("Using VCLK = MCLK\n");
+ dev_dbg(info->device, "Using VCLK = MCLK\n");
return 1;
} else if (abs(freq - (mclk / 2)) < 250) {
- DPRINTK("Using VCLK = MCLK/2\n");
+ dev_dbg(info->device, "Using VCLK = MCLK/2\n");
return 2;
}
/* memory size in pixels */
unsigned pixels = info->screen_size * 8 / var->bits_per_pixel;
- switch (var->bits_per_pixel) {
- case 1:
- pixels /= 4;
- break; /* 8 pixel per byte, only 1/4th of mem usable */
- case 8:
- case 16:
- case 32:
- break; /* 1 pixel == 1 byte */
- default:
- printk(KERN_ERR "cirrusfb: mode %dx%dx%d rejected..."
- "color depth not supported.\n",
- var->xres, var->yres, var->bits_per_pixel);
- DPRINTK("EXIT - EINVAL error\n");
- return -EINVAL;
- }
-
- if (var->xres_virtual < var->xres)
- var->xres_virtual = var->xres;
- /* use highest possible virtual resolution */
- if (var->yres_virtual == -1) {
- var->yres_virtual = pixels / var->xres_virtual;
-
- printk(KERN_INFO "cirrusfb: virtual resolution set to "
- "maximum of %dx%d\n", var->xres_virtual,
- var->yres_virtual);
- }
- if (var->yres_virtual < var->yres)
- var->yres_virtual = var->yres;
-
- if (var->xres_virtual * var->yres_virtual > pixels) {
- printk(KERN_ERR "cirrusfb: mode %dx%dx%d rejected... "
- "virtual resolution too high to fit into video memory!\n",
- var->xres_virtual, var->yres_virtual,
- var->bits_per_pixel);
- DPRINTK("EXIT - EINVAL error\n");
- return -EINVAL;
- }
-
-
- if (var->xoffset < 0)
- var->xoffset = 0;
- if (var->yoffset < 0)
- var->yoffset = 0;
-
- /* truncate xoffset and yoffset to maximum if too high */
- if (var->xoffset > var->xres_virtual - var->xres)
- var->xoffset = var->xres_virtual - var->xres - 1;
- if (var->yoffset > var->yres_virtual - var->yres)
- var->yoffset = var->yres_virtual - var->yres - 1;
-
switch (var->bits_per_pixel) {
case 1:
var->red.offset = 0;
break;
default:
- DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel);
+ dev_dbg(info->device,
+ "Unsupported bpp size: %d\n", var->bits_per_pixel);
assert(false);
/* should never occur */
break;
}
+ if (var->xres_virtual < var->xres)
+ var->xres_virtual = var->xres;
+ /* use highest possible virtual resolution */
+ if (var->yres_virtual == -1) {
+ var->yres_virtual = pixels / var->xres_virtual;
+
+ dev_info(info->device,
+ "virtual resolution set to maximum of %dx%d\n",
+ var->xres_virtual, var->yres_virtual);
+ }
+ if (var->yres_virtual < var->yres)
+ var->yres_virtual = var->yres;
+
+ if (var->xres_virtual * var->yres_virtual > pixels) {
+ dev_err(info->device, "mode %dx%dx%d rejected... "
+ "virtual resolution too high to fit into video memory!\n",
+ var->xres_virtual, var->yres_virtual,
+ var->bits_per_pixel);
+ return -EINVAL;
+ }
+
+
+ if (var->xoffset < 0)
+ var->xoffset = 0;
+ if (var->yoffset < 0)
+ var->yoffset = 0;
+
+ /* truncate xoffset and yoffset to maximum if too high */
+ if (var->xoffset > var->xres_virtual - var->xres)
+ var->xoffset = var->xres_virtual - var->xres - 1;
+ if (var->yoffset > var->yres_virtual - var->yres)
+ var->yoffset = var->yres_virtual - var->yres - 1;
+
var->red.msb_right =
var->green.msb_right =
var->blue.msb_right =
yres = (yres + 1) / 2;
if (yres >= 1280) {
- printk(KERN_ERR "cirrusfb: ERROR: VerticalTotal >= 1280; "
+ dev_err(info->device, "ERROR: VerticalTotal >= 1280; "
"special treatment required! (TODO)\n");
- DPRINTK("EXIT - EINVAL error\n");
return -EINVAL;
}
break;
default:
- DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel);
+ dev_dbg(info->device,
+ "Unsupported bpp size: %d\n", var->bits_per_pixel);
assert(false);
/* should never occur */
break;
/* convert from ps to kHz */
freq = PICOS2KHZ(var->pixclock);
- DPRINTK("desired pixclock: %ld kHz\n", freq);
+ dev_dbg(info->device, "desired pixclock: %ld kHz\n", freq);
maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx];
regs->multiplexing = 0;
break;
default:
- printk(KERN_ERR "cirrusfb: Frequency greater "
- "than maxclock (%ld kHz)\n", maxclock);
- DPRINTK("EXIT - return -EINVAL\n");
+ dev_err(info->device,
+ "Frequency greater than maxclock (%ld kHz)\n",
+ maxclock);
return -EINVAL;
}
}
return 0;
}
-static void cirrusfb_set_mclk_as_source(const struct cirrusfb_info *cinfo,
- int div)
+static void cirrusfb_set_mclk_as_source(const struct fb_info *info, int div)
{
+ struct cirrusfb_info *cinfo = info->par;
unsigned char old1f, old1e;
+
assert(cinfo != NULL);
old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40;
if (div) {
- DPRINTK("Set %s as pixclock source.\n",
- (div == 2) ? "MCLK/2" : "MCLK");
+ dev_dbg(info->device, "Set %s as pixclock source.\n",
+ (div == 2) ? "MCLK/2" : "MCLK");
old1f |= 0x40;
old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1;
if (div == 2)
long freq;
int nom, den, div;
- DPRINTK("ENTER\n");
- DPRINTK("Requested mode: %dx%dx%d\n",
+ dev_dbg(info->device, "Requested mode: %dx%dx%d\n",
var->xres, var->yres, var->bits_per_pixel);
- DPRINTK("pixclock: %d\n", var->pixclock);
+ dev_dbg(info->device, "pixclock: %d\n", var->pixclock);
init_vgachip(info);
err = cirrusfb_decode_var(var, ®s, info);
if (err) {
/* should never happen */
- DPRINTK("mode change aborted. invalid var.\n");
+ dev_dbg(info->device, "mode change aborted. invalid var.\n");
return -EINVAL;
}
vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */
/* if debugging is enabled, all parameters get output before writing */
- DPRINTK("CRT0: %d\n", htotal);
+ dev_dbg(info->device, "CRT0: %d\n", htotal);
vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal);
- DPRINTK("CRT1: %d\n", hdispend);
+ dev_dbg(info->device, "CRT1: %d\n", hdispend);
vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend);
- DPRINTK("CRT2: %d\n", var->xres / 8);
+ dev_dbg(info->device, "CRT2: %d\n", var->xres / 8);
vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8);
/* + 128: Compatible read */
- DPRINTK("CRT3: 128+%d\n", (htotal + 5) % 32);
+ dev_dbg(info->device, "CRT3: 128+%d\n", (htotal + 5) % 32);
vga_wcrt(regbase, VGA_CRTC_H_BLANK_END,
128 + ((htotal + 5) % 32));
- DPRINTK("CRT4: %d\n", hsyncstart);
+ dev_dbg(info->device, "CRT4: %d\n", hsyncstart);
vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart);
tmp = hsyncend % 32;
if ((htotal + 5) & 32)
tmp += 128;
- DPRINTK("CRT5: %d\n", tmp);
+ dev_dbg(info->device, "CRT5: %d\n", tmp);
vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp);
- DPRINTK("CRT6: %d\n", vtotal & 0xff);
+ dev_dbg(info->device, "CRT6: %d\n", vtotal & 0xff);
vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff);
tmp = 16; /* LineCompare bit #9 */
tmp |= 64;
if (vsyncstart & 512)
tmp |= 128;
- DPRINTK("CRT7: %d\n", tmp);
+ dev_dbg(info->device, "CRT7: %d\n", tmp);
vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp);
tmp = 0x40; /* LineCompare bit #8 */
tmp |= 0x20;
if (var->vmode & FB_VMODE_DOUBLE)
tmp |= 0x80;
- DPRINTK("CRT9: %d\n", tmp);
+ dev_dbg(info->device, "CRT9: %d\n", tmp);
vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp);
- DPRINTK("CRT10: %d\n", vsyncstart & 0xff);
+ dev_dbg(info->device, "CRT10: %d\n", vsyncstart & 0xff);
vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff);
- DPRINTK("CRT11: 64+32+%d\n", vsyncend % 16);
+ dev_dbg(info->device, "CRT11: 64+32+%d\n", vsyncend % 16);
vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32);
- DPRINTK("CRT12: %d\n", vdispend & 0xff);
+ dev_dbg(info->device, "CRT12: %d\n", vdispend & 0xff);
vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff);
- DPRINTK("CRT15: %d\n", (vdispend + 1) & 0xff);
+ dev_dbg(info->device, "CRT15: %d\n", (vdispend + 1) & 0xff);
vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff);
- DPRINTK("CRT16: %d\n", vtotal & 0xff);
+ dev_dbg(info->device, "CRT16: %d\n", vtotal & 0xff);
vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff);
- DPRINTK("CRT18: 0xff\n");
+ dev_dbg(info->device, "CRT18: 0xff\n");
vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff);
tmp = 0;
if (vtotal & 512)
tmp |= 128;
- DPRINTK("CRT1a: %d\n", tmp);
+ dev_dbg(info->device, "CRT1a: %d\n", tmp);
vga_wcrt(regbase, CL_CRT1A, tmp);
freq = PICOS2KHZ(var->pixclock);
bestclock(freq, &nom, &den, &div);
+ dev_dbg(info->device, "VCLK freq: %ld kHz nom: %d den: %d div: %d\n",
+ freq, nom, den, div);
+
/* set VCLK0 */
/* hardware RefClock: 14.31818 MHz */
/* formula: VClk = (OSC * N) / (D * (1+P)) */
/* if freq is close to mclk or mclk/2 select mclk
* as clock source
*/
- int divMCLK = cirrusfb_check_mclk(cinfo, freq);
+ int divMCLK = cirrusfb_check_mclk(info, freq);
if (divMCLK) {
nom = 0;
- cirrusfb_set_mclk_as_source(cinfo, divMCLK);
+ cirrusfb_set_mclk_as_source(info, divMCLK);
}
}
if (nom) {
(cinfo->btype == BT_GD5480))
tmp |= 0x80;
- DPRINTK("CL_SEQR1B: %ld\n", (long) tmp);
+ dev_dbg(info->device, "CL_SEQR1B: %ld\n", (long) tmp);
vga_wseq(regbase, CL_SEQR1B, tmp);
}
/* programming for different color depths */
if (var->bits_per_pixel == 1) {
- DPRINTK("cirrusfb: preparing for 1 bit deep display\n");
+ dev_dbg(info->device, "preparing for 1 bit deep display\n");
vga_wgfx(regbase, VGA_GFX_MODE, 0); /* mode register */
/* SR07 */
case BT_PICASSO4:
case BT_ALPINE:
case BT_GD5480:
- DPRINTK(" (for GD54xx)\n");
vga_wseq(regbase, CL_SEQR7,
- regs.multiplexing ?
+ regs.multiplexing ?
bi->sr07_1bpp_mux : bi->sr07_1bpp);
break;
case BT_LAGUNA:
- DPRINTK(" (for GD546x)\n");
vga_wseq(regbase, CL_SEQR7,
vga_rseq(regbase, CL_SEQR7) & ~0x01);
break;
default:
- printk(KERN_WARNING "cirrusfb: unknown Board\n");
+ dev_warn(info->device, "unknown Board\n");
break;
}
/* setting the SEQRF on SD64 is not necessary
* (only during init)
*/
- DPRINTK("(for SD64)\n");
/* MCLK select */
vga_wseq(regbase, CL_SEQR1F, 0x1a);
break;
case BT_PICCOLO:
case BT_SPECTRUM:
- DPRINTK("(for Piccolo/Spectrum)\n");
/* ### ueberall 0x22? */
/* ##vorher 1c MCLK select */
vga_wseq(regbase, CL_SEQR1F, 0x22);
break;
case BT_PICASSO:
- DPRINTK("(for Picasso)\n");
/* ##vorher 22 MCLK select */
vga_wseq(regbase, CL_SEQR1F, 0x22);
/* ## vorher d0 avoid FIFO underruns..? */
case BT_ALPINE:
case BT_GD5480:
case BT_LAGUNA:
- DPRINTK(" (for GD54xx)\n");
/* do nothing */
break;
default:
- printk(KERN_WARNING "cirrusfb: unknown Board\n");
+ dev_warn(info->device, "unknown Board\n");
break;
}
*/
else if (var->bits_per_pixel == 8) {
- DPRINTK("cirrusfb: preparing for 8 bit deep display\n");
+ dev_dbg(info->device, "preparing for 8 bit deep display\n");
switch (cinfo->btype) {
case BT_SD64:
case BT_PICCOLO:
case BT_PICASSO4:
case BT_ALPINE:
case BT_GD5480:
- DPRINTK(" (for GD54xx)\n");
vga_wseq(regbase, CL_SEQR7,
regs.multiplexing ?
bi->sr07_8bpp_mux : bi->sr07_8bpp);
break;
case BT_LAGUNA:
- DPRINTK(" (for GD546x)\n");
vga_wseq(regbase, CL_SEQR7,
vga_rseq(regbase, CL_SEQR7) | 0x01);
break;
default:
- printk(KERN_WARNING "cirrusfb: unknown Board\n");
+ dev_warn(info->device, "unknown Board\n");
break;
}
break;
case BT_ALPINE:
- DPRINTK(" (for GD543x)\n");
/* We already set SRF and SR1F */
break;
case BT_GD5480:
case BT_LAGUNA:
- DPRINTK(" (for GD54xx)\n");
/* do nothing */
break;
default:
- printk(KERN_WARNING "cirrusfb: unknown Board\n");
+ dev_warn(info->device, "unknown board\n");
break;
}
*/
else if (var->bits_per_pixel == 16) {
- DPRINTK("cirrusfb: preparing for 16 bit deep display\n");
+ dev_dbg(info->device, "preparing for 16 bit deep display\n");
switch (cinfo->btype) {
case BT_SD64:
/* Extended Sequencer Mode: 256c col. mode */
break;
case BT_ALPINE:
- DPRINTK(" (for GD543x)\n");
vga_wseq(regbase, CL_SEQR7, 0xa7);
break;
case BT_GD5480:
- DPRINTK(" (for GD5480)\n");
vga_wseq(regbase, CL_SEQR7, 0x17);
/* We already set SRF and SR1F */
break;
case BT_LAGUNA:
- DPRINTK(" (for GD546x)\n");
vga_wseq(regbase, CL_SEQR7,
vga_rseq(regbase, CL_SEQR7) & ~0x01);
break;
default:
- printk(KERN_WARNING "CIRRUSFB: unknown Board\n");
+ dev_warn(info->device, "unknown Board\n");
break;
}
*/
else if (var->bits_per_pixel == 32) {
- DPRINTK("cirrusfb: preparing for 32 bit deep display\n");
+ dev_dbg(info->device, "preparing for 32 bit deep display\n");
switch (cinfo->btype) {
case BT_SD64:
/* Extended Sequencer Mode: 256c col. mode */
break;
case BT_ALPINE:
- DPRINTK(" (for GD543x)\n");
vga_wseq(regbase, CL_SEQR7, 0xa9);
break;
case BT_GD5480:
- DPRINTK(" (for GD5480)\n");
vga_wseq(regbase, CL_SEQR7, 0x19);
/* We already set SRF and SR1F */
break;
case BT_LAGUNA:
- DPRINTK(" (for GD546x)\n");
vga_wseq(regbase, CL_SEQR7,
vga_rseq(regbase, CL_SEQR7) & ~0x01);
break;
default:
- printk(KERN_WARNING "cirrusfb: unknown Board\n");
+ dev_warn(info->device, "unknown Board\n");
break;
}
*/
else
- printk(KERN_ERR "cirrusfb: What's this?? "
- " requested color depth == %d.\n",
+ dev_err(info->device,
+ "What's this? requested color depth == %d.\n",
var->bits_per_pixel);
vga_wcrt(regbase, VGA_CRTC_OFFSET, offset & 0xff);
*/
vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, tmp);
- DPRINTK("CL_SEQR1: %d\n", tmp);
+ dev_dbg(info->device, "CL_SEQR1: %d\n", tmp);
cinfo->currentmode = regs;
cirrusfb_pan_display(var, info);
#ifdef CIRRUSFB_DEBUG
- cirrusfb_dump();
+ cirrusfb_dbg_reg_dump(info, NULL);
#endif
- DPRINTK("EXIT\n");
return 0;
}
unsigned char tmp = 0, tmp2 = 0, xpix;
struct cirrusfb_info *cinfo = info->par;
- DPRINTK("ENTER\n");
- DPRINTK("virtual offset: (%d,%d)\n", var->xoffset, var->yoffset);
+ dev_dbg(info->device,
+ "virtual offset: (%d,%d)\n", var->xoffset, var->yoffset);
/* no range checks for xoffset and yoffset, */
/* as fb_pan_display has already done this */
cirrusfb_WaitBLT(cinfo->regbase);
- DPRINTK("EXIT\n");
return 0;
}
struct cirrusfb_info *cinfo = info->par;
int current_mode = cinfo->blank_mode;
- DPRINTK("ENTER, blank mode = %d\n", blank_mode);
+ dev_dbg(info->device, "ENTER, blank mode = %d\n", blank_mode);
if (info->state != FBINFO_STATE_RUNNING ||
current_mode == blank_mode) {
- DPRINTK("EXIT, returning 0\n");
+ dev_dbg(info->device, "EXIT, returning 0\n");
return 0;
}
vga_wgfx(cinfo->regbase, CL_GRE, 0x06);
break;
default:
- DPRINTK("EXIT, returning 1\n");
+ dev_dbg(info->device, "EXIT, returning 1\n");
return 1;
}
cinfo->blank_mode = blank_mode;
- DPRINTK("EXIT, returning 0\n");
+ dev_dbg(info->device, "EXIT, returning 0\n");
/* Let fbcon do a soft blank for us */
return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
struct cirrusfb_info *cinfo = info->par;
const struct cirrusfb_board_info_rec *bi;
- DPRINTK("ENTER\n");
-
assert(cinfo != NULL);
bi = &cirrusfb_board_info[cinfo->btype];
break;
default:
- printk(KERN_ERR "cirrusfb: Warning: Unknown board type\n");
+ dev_err(info->device, "Warning: Unknown board type\n");
break;
}
/* misc... */
WHDR(cinfo, 0); /* Hidden DAC register: - */
-
- DPRINTK("EXIT\n");
return;
}
#ifdef CONFIG_ZORRO /* only works on Zorro boards */
static int IsOn = 0; /* XXX not ok for multiple boards */
- DPRINTK("ENTER\n");
-
if (cinfo->btype == BT_PICASSO4)
return; /* nothing to switch */
if (cinfo->btype == BT_ALPINE)
if (cinfo->btype == BT_PICASSO) {
if ((on && !IsOn) || (!on && IsOn))
WSFR(cinfo, 0xff);
-
- DPRINTK("EXIT\n");
return;
}
if (on) {
case BT_SPECTRUM:
WSFR(cinfo, 0x4f);
break;
- default: /* do nothing */ break;
+ default: /* do nothing */
+ break;
}
}
-
- DPRINTK("EXIT\n");
#endif /* CONFIG_ZORRO */
}
#define PREP_IO_BASE ((volatile unsigned char *) 0x80000000)
static void get_prep_addrs(unsigned long *display, unsigned long *registers)
{
- DPRINTK("ENTER\n");
-
*display = PREP_VIDEO_BASE;
*registers = (unsigned long) PREP_IO_BASE;
-
- DPRINTK("EXIT\n");
}
#endif /* CONFIG_PPC_PREP */
* based on the DRAM bandwidth bit and DRAM bank switching bit. This
* works with 1MB, 2MB and 4MB configurations (which the Motorola boards
* seem to have. */
-static unsigned int __devinit cirrusfb_get_memsize(u8 __iomem *regbase)
+static unsigned int __devinit cirrusfb_get_memsize(struct fb_info *info,
+ u8 __iomem *regbase)
{
unsigned long mem;
unsigned char SRF;
- DPRINTK("ENTER\n");
-
SRF = vga_rseq(regbase, CL_SEQRF);
switch ((SRF & 0x18)) {
case 0x08:
mem = 2048 * 1024;
break;
default:
- printk(KERN_WARNING "CLgenfb: Unknown memory size!\n");
+ dev_warn(info->device, "CLgenfb: Unknown memory size!\n");
mem = 1024 * 1024;
}
if (SRF & 0x80)
mem *= 2;
/* TODO: Handling of GD5446/5480 (see XF86 sources ...) */
-
- DPRINTK("EXIT\n");
return mem;
}
assert(display != NULL);
assert(registers != NULL);
- DPRINTK("ENTER\n");
-
*display = 0;
*registers = 0;
}
assert(*display != 0);
-
- DPRINTK("EXIT\n");
}
static void cirrusfb_pci_unmap(struct fb_info *info)
int err;
enum cirrus_board btype;
- DPRINTK("ENTER\n");
-
- printk(KERN_INFO "cirrusfb: Driver for Cirrus Logic based "
- "graphic boards, v" CIRRUSFB_VERSION "\n");
-
btype = cinfo->btype;
/* sanity checks */
/* set all the vital stuff */
cirrusfb_set_fbinfo(info);
- DPRINTK("cirrusfb: (RAM start set to: 0x%p)\n", info->screen_base);
+ dev_dbg(info->device, "(RAM start set to: 0x%p)\n", info->screen_base);
err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
if (!err) {
- DPRINTK("wrong initial video mode\n");
+ dev_dbg(info->device, "wrong initial video mode\n");
err = -EINVAL;
goto err_dealloc_cmap;
}
err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info);
if (err < 0) {
/* should never happen */
- DPRINTK("choking on default var... umm, no good.\n");
+ dev_dbg(info->device,
+ "choking on default var... umm, no good.\n");
goto err_dealloc_cmap;
}
err = register_framebuffer(info);
if (err < 0) {
- printk(KERN_ERR "cirrusfb: could not register "
- "fb device; err = %d!\n", err);
+ dev_err(info->device,
+ "could not register fb device; err = %d!\n", err);
goto err_dealloc_cmap;
}
- DPRINTK("EXIT, returning 0\n");
return 0;
err_dealloc_cmap:
static void __devexit cirrusfb_cleanup(struct fb_info *info)
{
struct cirrusfb_info *cinfo = info->par;
- DPRINTK("ENTER\n");
switch_monitor(cinfo, 0);
-
unregister_framebuffer(info);
fb_dealloc_cmap(&info->cmap);
- printk("Framebuffer unregistered\n");
+ dev_dbg(info->device, "Framebuffer unregistered\n");
cinfo->unmap(info);
framebuffer_release(info);
-
- DPRINTK("EXIT\n");
}
#ifdef CONFIG_PCI
cinfo = info->par;
cinfo->btype = btype = (enum cirrus_board) ent->driver_data;
- DPRINTK(" Found PCI device, base address 0 is 0x%x, btype set to %d\n",
- pdev->resource[0].start, btype);
- DPRINTK(" base address 1 is 0x%x\n", pdev->resource[1].start);
+ dev_dbg(info->device,
+ " Found PCI device, base address 0 is 0x%Lx, btype set to %d\n",
+ (unsigned long long)pdev->resource[0].start, btype);
+ dev_dbg(info->device, " base address 1 is 0x%Lx\n",
+ (unsigned long long)pdev->resource[1].start);
if (isPReP) {
pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, 0x00000000);
/* PReP dies if we ioremap the IO registers, but it works w/out... */
cinfo->regbase = (char __iomem *) info->fix.mmio_start;
} else {
- DPRINTK("Attempt to get PCI info for Cirrus Graphics Card\n");
+ dev_dbg(info->device,
+ "Attempt to get PCI info for Cirrus Graphics Card\n");
get_pci_addrs(pdev, &board_addr, &info->fix.mmio_start);
/* FIXME: this forces VGA. alternatives? */
cinfo->regbase = NULL;
}
- DPRINTK("Board address: 0x%lx, register address: 0x%lx\n",
+ dev_dbg(info->device, "Board address: 0x%lx, register address: 0x%lx\n",
board_addr, info->fix.mmio_start);
board_size = (btype == BT_GD5480) ?
- 32 * MB_ : cirrusfb_get_memsize(cinfo->regbase);
+ 32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase);
ret = pci_request_regions(pdev, "cirrusfb");
if (ret < 0) {
- printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, "
- "abort\n",
- board_addr);
+ dev_err(info->device, "cannot reserve region 0x%lx, abort\n",
+ board_addr);
goto err_release_fb;
}
#if 0 /* if the system didn't claim this region, we would... */
if (!request_mem_region(0xA0000, 65535, "cirrusfb")) {
- printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, abort\n"
-,
- 0xA0000L);
+ dev_err(info->device, "cannot reserve region 0x%lx, abort\n",
+ 0xA0000L);
ret = -EBUSY;
goto err_release_regions;
}
info->screen_size = board_size;
cinfo->unmap = cirrusfb_pci_unmap;
- printk(KERN_INFO "RAM (%lu kB) at 0x%lx, Cirrus "
- "Logic chipset on PCI bus\n",
- info->screen_size >> 10, board_addr);
+ dev_info(info->device,
+ "Cirrus Logic chipset on PCI bus, RAM (%lu kB) at 0x%lx\n",
+ info->screen_size >> 10, board_addr);
pci_set_drvdata(pdev, info);
ret = cirrusfb_register(info);
static void __devexit cirrusfb_pci_unregister(struct pci_dev *pdev)
{
struct fb_info *info = pci_get_drvdata(pdev);
- DPRINTK("ENTER\n");
cirrusfb_cleanup(info);
-
- DPRINTK("EXIT\n");
}
static struct pci_driver cirrusfb_pci_driver = {
if (cirrusfb_zorro_table2[btype].id2)
z2 = zorro_find_device(cirrusfb_zorro_table2[btype].id2, NULL);
size = cirrusfb_zorro_table2[btype].size;
- printk(KERN_INFO "cirrusfb: %s board detected; ",
- cirrusfb_board_info[btype].name);
info = framebuffer_alloc(sizeof(struct cirrusfb_info), &z->dev);
if (!info) {
goto err_out;
}
+ dev_info(info->device, "%s board detected\n",
+ cirrusfb_board_info[btype].name);
+
cinfo = info->par;
cinfo->btype = btype;
info->screen_size = size;
if (!zorro_request_device(z, "cirrusfb")) {
- printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, "
- "abort\n",
- board_addr);
+ dev_err(info->device, "cannot reserve region 0x%lx, abort\n",
+ board_addr);
ret = -EBUSY;
goto err_release_fb;
}
- printk(" RAM (%lu MB) at $%lx, ", board_size / MB_, board_addr);
-
ret = -EIO;
if (btype == BT_PICASSO4) {
- printk(KERN_INFO " REG at $%lx\n", board_addr + 0x600000);
+ dev_info(info->device, " REG at $%lx\n", board_addr + 0x600000);
/* To be precise, for the P4 this is not the */
/* begin of the board, but the begin of RAM. */
if (!cinfo->regbase)
goto err_release_region;
- DPRINTK("cirrusfb: Virtual address for board set to: $%p\n",
+ dev_dbg(info->device, "Virtual address for board set to: $%p\n",
cinfo->regbase);
cinfo->regbase += 0x600000;
info->fix.mmio_start = board_addr + 0x600000;
if (!info->screen_base)
goto err_unmap_regbase;
} else {
- printk(KERN_INFO " REG at $%lx\n",
- (unsigned long) z2->resource.start);
+ dev_info(info->device, " REG at $%lx\n",
+ (unsigned long) z2->resource.start);
info->fix.smem_start = board_addr;
if (board_addr > 0x01000000)
cinfo->regbase = (caddr_t) ZTWO_VADDR(z2->resource.start);
info->fix.mmio_start = z2->resource.start;
- DPRINTK("cirrusfb: Virtual address for board set to: $%p\n",
+ dev_dbg(info->device, "Virtual address for board set to: $%p\n",
cinfo->regbase);
}
cinfo->unmap = cirrusfb_zorro_unmap;
- printk(KERN_INFO "Cirrus Logic chipset on Zorro bus\n");
+ dev_info(info->device,
+ "Cirrus Logic chipset on Zorro bus, RAM (%lu MB) at $%lx\n",
+ board_size / MB_, board_addr);
+
zorro_set_drvdata(z, info);
ret = cirrusfb_register(info);
void __devexit cirrusfb_zorro_unregister(struct zorro_dev *z)
{
struct fb_info *info = zorro_get_drvdata(z);
- DPRINTK("ENTER\n");
cirrusfb_cleanup(info);
-
- DPRINTK("EXIT\n");
}
static struct zorro_driver cirrusfb_zorro_driver = {
}
#ifndef MODULE
-static int __init cirrusfb_setup(char *options) {
+static int __init cirrusfb_setup(char *options)
+{
char *this_opt;
- DPRINTK("ENTER\n");
-
if (!options || !*options)
return 0;
if (!*this_opt)
continue;
- DPRINTK("cirrusfb_setup: option '%s'\n", this_opt);
-
if (!strcmp(this_opt, "noaccel"))
noaccel = 1;
else if (!strncmp(this_opt, "mode:", 5))
{
assert(cinfo != NULL);
- DPRINTK("ENTER\n");
-
if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) {
/* if we're just in "write value" mode, write back the */
/* same value as before to not modify anything */
/* dummy write on Reg0 to be on "write index" mode next time */
vga_w(cinfo->regbase, VGA_ATT_IW, 0x00);
-
- DPRINTK("EXIT\n");
}
/*** WHDR() - write into the Hidden DAC register ***/
u_long nsrc, ndest;
u_char bltmode;
- DPRINTK("ENTER\n");
-
nwidth = width - 1;
nheight = height - 1;
/* and finally: GO! */
vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */
-
- DPRINTK("EXIT\n");
}
/*******************************************************************
u_long ndest;
u_char op;
- DPRINTK("ENTER\n");
-
nwidth = width - 1;
nheight = height - 1;
/* and finally: GO! */
vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */
-
- DPRINTK("EXIT\n");
}
/**************************************************************************
*den = 0;
*div = 0;
- DPRINTK("ENTER\n");
-
if (freq < 8000)
freq = 8000;
}
}
}
-
- DPRINTK("Best possible values for given frequency:\n");
- DPRINTK(" freq: %ld kHz nom: %d den: %d div: %d\n",
- freq, *nom, *den, *div);
-
- DPRINTK("EXIT\n");
}
/* -------------------------------------------------------------------------
#ifdef CIRRUSFB_DEBUG
-/**
- * cirrusfb_dbg_print_byte
- * @name: name associated with byte value to be displayed
- * @val: byte value to be displayed
- *
- * DESCRIPTION:
- * Display an indented string, along with a hexidecimal byte value, and
- * its decoded bits. Bits 7 through 0 are listed in left-to-right
- * order.
- */
-
-static
-void cirrusfb_dbg_print_byte(const char *name, unsigned char val)
-{
- DPRINTK("%8s = 0x%02X (bits 7-0: %c%c%c%c%c%c%c%c)\n",
- name, val,
- val & 0x80 ? '1' : '0',
- val & 0x40 ? '1' : '0',
- val & 0x20 ? '1' : '0',
- val & 0x10 ? '1' : '0',
- val & 0x08 ? '1' : '0',
- val & 0x04 ? '1' : '0',
- val & 0x02 ? '1' : '0',
- val & 0x01 ? '1' : '0');
-}
-
/**
* cirrusfb_dbg_print_regs
* @base: If using newmmio, the newmmio base address, otherwise %NULL
* used at the given @base address to query the information.
*/
-static
-void cirrusfb_dbg_print_regs(caddr_t regbase,
- enum cirrusfb_dbg_reg_class reg_class, ...)
+static void cirrusfb_dbg_print_regs(struct fb_info *info,
+ caddr_t regbase,
+ enum cirrusfb_dbg_reg_class reg_class, ...)
{
va_list list;
unsigned char val = 0;
break;
}
- cirrusfb_dbg_print_byte(name, val);
+ dev_dbg(info->device, "%8s = 0x%02X\n", name, val);
name = va_arg(list, char *);
}
va_end(list);
}
-/**
- * cirrusfb_dump
- * @cirrusfbinfo:
- *
- * DESCRIPTION:
- */
-
-static void cirrusfb_dump(void)
-{
- cirrusfb_dbg_reg_dump(NULL);
-}
-
/**
* cirrusfb_dbg_reg_dump
* @base: If using newmmio, the newmmio base address, otherwise %NULL
* used at the given @base address to query the information.
*/
-static
-void cirrusfb_dbg_reg_dump(caddr_t regbase)
+static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase)
{
- DPRINTK("CIRRUSFB VGA CRTC register dump:\n");
+ dev_dbg(info->device, "VGA CRTC register dump:\n");
- cirrusfb_dbg_print_regs(regbase, CRT,
+ cirrusfb_dbg_print_regs(info, regbase, CRT,
"CR00", 0x00,
"CR01", 0x01,
"CR02", 0x02,
"CR3F", 0x3F,
NULL);
- DPRINTK("\n");
+ dev_dbg(info->device, "\n");
- DPRINTK("CIRRUSFB VGA SEQ register dump:\n");
+ dev_dbg(info->device, "VGA SEQ register dump:\n");
- cirrusfb_dbg_print_regs(regbase, SEQ,
+ cirrusfb_dbg_print_regs(info, regbase, SEQ,
"SR00", 0x00,
"SR01", 0x01,
"SR02", 0x02,
"SR1F", 0x1F,
NULL);
- DPRINTK("\n");
+ dev_dbg(info->device, "\n");
}
#endif /* CIRRUSFB_DEBUG */
projects / linux-2.6-omap-h63xx.git / commitdiff