V4L/DVB (10784): mxl5007t: update driver for MxL 5007T V4

Signed-off-by: Michael Krufky <mkrufky@linuxtv.org>
Signed-off-by: Asaf Fishov <afishov@maxlinear.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

diff --git a/drivers/media/common/tuners/mxl5007t.c b/drivers/media/common/tuners/mxl5007t.c
index b13de8c4662a938f6ab9e768bebb1f8b84a2e261..2d02698d4f4fd8c9d87c6864b027432e138972c6 100644 (file)
--- a/drivers/media/common/tuners/mxl5007t.c
+++ b/drivers/media/common/tuners/mxl5007t.c
@@ -1,7 +1,7 @@
 /*
  *  mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
  *
- *  Copyright (C) 2008 Michael Krufky <mkrufky@linuxtv.org>
+ *  Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -66,15 +66,17 @@ MODULE_PARM_DESC(debug, "set debug level");
 #define MHz 1000000
 
 enum mxl5007t_mode {
-       MxL_MODE_OTA_DVBT_ATSC        =    0,
-       MxL_MODE_OTA_ISDBT            =    4,
-       MxL_MODE_CABLE_DIGITAL        = 0x10,
+       MxL_MODE_ISDBT     =    0,
+       MxL_MODE_DVBT      =    1,
+       MxL_MODE_ATSC      =    2,
+       MxL_MODE_CABLE     = 0x10,
 };
 
 enum mxl5007t_chip_version {
        MxL_UNKNOWN_ID     = 0x00,
        MxL_5007_V1_F1     = 0x11,
        MxL_5007_V1_F2     = 0x12,
+       MxL_5007_V4        = 0x14,
        MxL_5007_V2_100_F1 = 0x21,
        MxL_5007_V2_100_F2 = 0x22,
        MxL_5007_V2_200_F1 = 0x23,
@@ -89,67 +91,61 @@ struct reg_pair_t {
 /* ------------------------------------------------------------------------- */
 
 static struct reg_pair_t init_tab[] = {
-       { 0x0b, 0x44 }, /* XTAL */
-       { 0x0c, 0x60 }, /* IF */
-       { 0x10, 0x00 }, /* MISC */
-       { 0x12, 0xca }, /* IDAC */
-       { 0x16, 0x90 }, /* MODE */
-       { 0x32, 0x38 }, /* MODE Analog/Digital */
-       { 0xd8, 0x18 }, /* CLK_OUT_ENABLE */
-       { 0x2c, 0x34 }, /* OVERRIDE */
-       { 0x4d, 0x40 }, /* OVERRIDE */
-       { 0x7f, 0x02 }, /* OVERRIDE */
-       { 0x9a, 0x52 }, /* OVERRIDE */
-       { 0x48, 0x5a }, /* OVERRIDE */
-       { 0x76, 0x1a }, /* OVERRIDE */
-       { 0x6a, 0x48 }, /* OVERRIDE */
-       { 0x64, 0x28 }, /* OVERRIDE */
-       { 0x66, 0xe6 }, /* OVERRIDE */
-       { 0x35, 0x0e }, /* OVERRIDE */
-       { 0x7e, 0x01 }, /* OVERRIDE */
-       { 0x83, 0x00 }, /* OVERRIDE */
-       { 0x04, 0x0b }, /* OVERRIDE */
-       { 0x05, 0x01 }, /* TOP_MASTER_ENABLE */
+       { 0x02, 0x06 },
+       { 0x03, 0x48 },
+       { 0x05, 0x04 },
+       { 0x06, 0x10 },
+       { 0x2e, 0x15 }, /* OVERRIDE */
+       { 0x30, 0x10 }, /* OVERRIDE */
+       { 0x45, 0x58 }, /* OVERRIDE */
+       { 0x48, 0x19 }, /* OVERRIDE */
+       { 0x52, 0x03 }, /* OVERRIDE */
+       { 0x53, 0x44 }, /* OVERRIDE */
+       { 0x6a, 0x4b }, /* OVERRIDE */
+       { 0x76, 0x00 }, /* OVERRIDE */
+       { 0x78, 0x18 }, /* OVERRIDE */
+       { 0x7a, 0x17 }, /* OVERRIDE */
+       { 0x85, 0x06 }, /* OVERRIDE */
+       { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
        { 0, 0 }
 };
 
 static struct reg_pair_t init_tab_cable[] = {
-       { 0x0b, 0x44 }, /* XTAL */
-       { 0x0c, 0x60 }, /* IF */
-       { 0x10, 0x00 }, /* MISC */
-       { 0x12, 0xca }, /* IDAC */
-       { 0x16, 0x90 }, /* MODE */
-       { 0x32, 0x38 }, /* MODE A/D */
-       { 0x71, 0x3f }, /* TOP1 */
-       { 0x72, 0x3f }, /* TOP2 */
-       { 0x74, 0x3f }, /* TOP3 */
-       { 0xd8, 0x18 }, /* CLK_OUT_ENABLE */
-       { 0x2c, 0x34 }, /* OVERRIDE */
-       { 0x4d, 0x40 }, /* OVERRIDE */
-       { 0x7f, 0x02 }, /* OVERRIDE */
-       { 0x9a, 0x52 }, /* OVERRIDE */
-       { 0x48, 0x5a }, /* OVERRIDE */
-       { 0x76, 0x1a }, /* OVERRIDE */
-       { 0x6a, 0x48 }, /* OVERRIDE */
-       { 0x64, 0x28 }, /* OVERRIDE */
-       { 0x66, 0xe6 }, /* OVERRIDE */
-       { 0x35, 0x0e }, /* OVERRIDE */
-       { 0x7e, 0x01 }, /* OVERRIDE */
-       { 0x04, 0x0b }, /* OVERRIDE */
-       { 0x68, 0xb4 }, /* OVERRIDE */
-       { 0x36, 0x00 }, /* OVERRIDE */
-       { 0x05, 0x01 }, /* TOP_MASTER_ENABLE */
+       { 0x02, 0x06 },
+       { 0x03, 0x48 },
+       { 0x05, 0x04 },
+       { 0x06, 0x10 },
+       { 0x09, 0x3f },
+       { 0x0a, 0x3f },
+       { 0x0b, 0x3f },
+       { 0x2e, 0x15 }, /* OVERRIDE */
+       { 0x30, 0x10 }, /* OVERRIDE */
+       { 0x45, 0x58 }, /* OVERRIDE */
+       { 0x48, 0x19 }, /* OVERRIDE */
+       { 0x52, 0x03 }, /* OVERRIDE */
+       { 0x53, 0x44 }, /* OVERRIDE */
+       { 0x6a, 0x4b }, /* OVERRIDE */
+       { 0x76, 0x00 }, /* OVERRIDE */
+       { 0x78, 0x18 }, /* OVERRIDE */
+       { 0x7a, 0x17 }, /* OVERRIDE */
+       { 0x85, 0x06 }, /* OVERRIDE */
+       { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
        { 0, 0 }
 };
 
 /* ------------------------------------------------------------------------- */
 
 static struct reg_pair_t reg_pair_rftune[] = {
-       { 0x11, 0x00 }, /* abort tune */
-       { 0x13, 0x15 },
-       { 0x14, 0x40 },
-       { 0x15, 0x0e },
-       { 0x11, 0x02 }, /* start tune */
+       { 0x0f, 0x00 }, /* abort tune */
+       { 0x0c, 0x15 },
+       { 0x0d, 0x40 },
+       { 0x0e, 0x0e },
+       { 0x1f, 0x87 }, /* OVERRIDE */
+       { 0x20, 0x1f }, /* OVERRIDE */
+       { 0x21, 0x87 }, /* OVERRIDE */
+       { 0x22, 0x1f }, /* OVERRIDE */
+       { 0x80, 0x01 }, /* freq dependent */
+       { 0x0f, 0x01 }, /* start tune */
        { 0, 0 }
 };
 
@@ -220,19 +216,20 @@ static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
                                   s32 if_diff_out_level)
 {
        switch (mode) {
-       case MxL_MODE_OTA_DVBT_ATSC:
-               set_reg_bits(state->tab_init, 0x32, 0x0f, 0x06);
-               set_reg_bits(state->tab_init, 0x35, 0xff, 0x0e);
+       case MxL_MODE_ATSC:
+               set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
                break;
-       case MxL_MODE_OTA_ISDBT:
-               set_reg_bits(state->tab_init, 0x32, 0x0f, 0x06);
-               set_reg_bits(state->tab_init, 0x35, 0xff, 0x12);
+       case MxL_MODE_DVBT:
+               set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
                break;
-       case MxL_MODE_CABLE_DIGITAL:
-               set_reg_bits(state->tab_init_cable, 0x71, 0xff, 0x01);
-               set_reg_bits(state->tab_init_cable, 0x72, 0xff,
+       case MxL_MODE_ISDBT:
+               set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
+               break;
+       case MxL_MODE_CABLE:
+               set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
+               set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
                             8 - if_diff_out_level);
-               set_reg_bits(state->tab_init_cable, 0x74, 0xff, 0x17);
+               set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
                break;
        default:
                mxl_fail(-EINVAL);
@@ -251,43 +248,43 @@ static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
                val = 0x00;
                break;
        case MxL_IF_4_5_MHZ:
-               val = 0x20;
+               val = 0x02;
                break;
        case MxL_IF_4_57_MHZ:
-               val = 0x30;
+               val = 0x03;
                break;
        case MxL_IF_5_MHZ:
-               val = 0x40;
+               val = 0x04;
                break;
        case MxL_IF_5_38_MHZ:
-               val = 0x50;
+               val = 0x05;
                break;
        case MxL_IF_6_MHZ:
-               val = 0x60;
+               val = 0x06;
                break;
        case MxL_IF_6_28_MHZ:
-               val = 0x70;
+               val = 0x07;
                break;
        case MxL_IF_9_1915_MHZ:
-               val = 0x80;
+               val = 0x08;
                break;
        case MxL_IF_35_25_MHZ:
-               val = 0x90;
+               val = 0x09;
                break;
        case MxL_IF_36_15_MHZ:
-               val = 0xa0;
+               val = 0x0a;
                break;
        case MxL_IF_44_MHZ:
-               val = 0xb0;
+               val = 0x0b;
                break;
        default:
                mxl_fail(-EINVAL);
                return;
        }
-       set_reg_bits(state->tab_init, 0x0c, 0xf0, val);
+       set_reg_bits(state->tab_init, 0x02, 0x0f, val);
 
        /* set inverted IF or normal IF */
-       set_reg_bits(state->tab_init, 0x0c, 0x08, invert_if ? 0x08 : 0x00);
+       set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
 
        return;
 }
@@ -295,56 +292,68 @@ static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
 static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
                                        enum mxl5007t_xtal_freq xtal_freq)
 {
-       u8 val;
-
        switch (xtal_freq) {
        case MxL_XTAL_16_MHZ:
-               val = 0x00; /* select xtal freq & Ref Freq */
+               /* select xtal freq & ref freq */
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
                break;
        case MxL_XTAL_20_MHZ:
-               val = 0x11;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
                break;
        case MxL_XTAL_20_25_MHZ:
-               val = 0x22;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
                break;
        case MxL_XTAL_20_48_MHZ:
-               val = 0x33;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
                break;
        case MxL_XTAL_24_MHZ:
-               val = 0x44;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
                break;
        case MxL_XTAL_25_MHZ:
-               val = 0x55;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
                break;
        case MxL_XTAL_25_14_MHZ:
-               val = 0x66;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
                break;
        case MxL_XTAL_27_MHZ:
-               val = 0x77;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
                break;
        case MxL_XTAL_28_8_MHZ:
-               val = 0x88;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
                break;
        case MxL_XTAL_32_MHZ:
-               val = 0x99;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
                break;
        case MxL_XTAL_40_MHZ:
-               val = 0xaa;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
                break;
        case MxL_XTAL_44_MHZ:
-               val = 0xbb;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
                break;
        case MxL_XTAL_48_MHZ:
-               val = 0xcc;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
                break;
        case MxL_XTAL_49_3811_MHZ:
-               val = 0xdd;
+               set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
+               set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
                break;
        default:
                mxl_fail(-EINVAL);
                return;
        }
-       set_reg_bits(state->tab_init, 0x0b, 0xff, val);
 
        return;
 }
@@ -361,16 +370,11 @@ static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
        mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
        mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
 
-       set_reg_bits(state->tab_init, 0x10, 0x40, cfg->loop_thru_enable << 6);
-
-       set_reg_bits(state->tab_init, 0xd8, 0x08, cfg->clk_out_enable << 3);
+       set_reg_bits(state->tab_init, 0x04, 0x01, cfg->loop_thru_enable);
+       set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
+       set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
 
-       set_reg_bits(state->tab_init, 0x10, 0x07, cfg->clk_out_amp);
-
-       /* set IDAC to automatic mode control by AGC */
-       set_reg_bits(state->tab_init, 0x12, 0x80, 0x00);
-
-       if (mode >= MxL_MODE_CABLE_DIGITAL) {
+       if (mode >= MxL_MODE_CABLE) {
                copy_reg_bits(state->tab_init, state->tab_init_cable);
                return state->tab_init_cable;
        } else
@@ -396,7 +400,7 @@ static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
                             * and DIG_MODEINDEX_CSF */
                break;
        case MxL_BW_7MHz:
-               val = 0x21;
+               val = 0x2a;
                break;
        case MxL_BW_8MHz:
                val = 0x3f;
@@ -405,7 +409,7 @@ static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
                mxl_fail(-EINVAL);
                return;
        }
-       set_reg_bits(state->tab_rftune, 0x13, 0x3f, val);
+       set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
 
        return;
 }
@@ -442,8 +446,11 @@ reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
        if (temp > 7812)
                dig_rf_freq++;
 
-       set_reg_bits(state->tab_rftune, 0x14, 0xff, (u8)dig_rf_freq);
-       set_reg_bits(state->tab_rftune, 0x15, 0xff, (u8)(dig_rf_freq >> 8));
+       set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
+       set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
+
+       if (rf_freq >= 333000000)
+               set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
 
        return state->tab_rftune;
 }
@@ -500,9 +507,10 @@ static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
 static int mxl5007t_soft_reset(struct mxl5007t_state *state)
 {
        u8 d = 0xff;
-       struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
-                              .buf = &d, .len = 1 };
-
+       struct i2c_msg msg = {
+               .addr = state->i2c_props.addr, .flags = 0,
+               .buf = &d, .len = 1
+       };
        int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
 
        if (ret != 1) {
@@ -529,9 +537,6 @@ static int mxl5007t_tuner_init(struct mxl5007t_state *state,
        if (mxl_fail(ret))
                goto fail;
        mdelay(1);
-
-       ret = mxl5007t_write_reg(state, 0x2c, 0x35);
-       mxl_fail(ret);
 fail:
        return ret;
 }
@@ -564,7 +569,7 @@ static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
        *rf_locked = 0;
        *ref_locked = 0;
 
-       ret = mxl5007t_read_reg(state, 0xcf, &d);
+       ret = mxl5007t_read_reg(state, 0xd8, &d);
        if (mxl_fail(ret))
                goto fail;
 
@@ -619,11 +624,11 @@ static int mxl5007t_set_params(struct dvb_frontend *fe,
                switch (params->u.vsb.modulation) {
                case VSB_8:
                case VSB_16:
-                       mode = MxL_MODE_OTA_DVBT_ATSC;
+                       mode = MxL_MODE_ATSC;
                        break;
                case QAM_64:
                case QAM_256:
-                       mode = MxL_MODE_CABLE_DIGITAL;
+                       mode = MxL_MODE_CABLE;
                        break;
                default:
                        mxl_err("modulation not set!");
@@ -645,7 +650,7 @@ static int mxl5007t_set_params(struct dvb_frontend *fe,
                        mxl_err("bandwidth not set!");
                        return -EINVAL;
                }
-               mode = MxL_MODE_OTA_DVBT_ATSC;
+               mode = MxL_MODE_DVBT;
        } else {
                mxl_err("modulation type not supported!");
                return -EINVAL;
@@ -682,18 +687,14 @@ static int mxl5007t_init(struct dvb_frontend *fe)
 {
        struct mxl5007t_state *state = fe->tuner_priv;
        int ret;
-       u8 d;
 
        if (fe->ops.i2c_gate_ctrl)
                fe->ops.i2c_gate_ctrl(fe, 1);
 
-       ret = mxl5007t_read_reg(state, 0x05, &d);
-       if (mxl_fail(ret))
-               goto fail;
-
-       ret = mxl5007t_write_reg(state, 0x05, d | 0x01);
+       /* wake from standby */
+       ret = mxl5007t_write_reg(state, 0x01, 0x01);
        mxl_fail(ret);
-fail:
+
        if (fe->ops.i2c_gate_ctrl)
                fe->ops.i2c_gate_ctrl(fe, 0);
 
@@ -704,18 +705,16 @@ static int mxl5007t_sleep(struct dvb_frontend *fe)
 {
        struct mxl5007t_state *state = fe->tuner_priv;
        int ret;
-       u8 d;
 
        if (fe->ops.i2c_gate_ctrl)
                fe->ops.i2c_gate_ctrl(fe, 1);
 
-       ret = mxl5007t_read_reg(state, 0x05, &d);
-       if (mxl_fail(ret))
-               goto fail;
-
-       ret = mxl5007t_write_reg(state, 0x05, d & ~0x01);
+       /* enter standby mode */
+       ret = mxl5007t_write_reg(state, 0x01, 0x00);
        mxl_fail(ret);
-fail:
+       ret = mxl5007t_write_reg(state, 0x0f, 0x00);
+       mxl_fail(ret);
+
        if (fe->ops.i2c_gate_ctrl)
                fe->ops.i2c_gate_ctrl(fe, 0);
 
@@ -775,7 +774,7 @@ static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
        int ret;
        u8 id;
 
-       ret = mxl5007t_read_reg(state, 0xd3, &id);
+       ret = mxl5007t_read_reg(state, 0xd9, &id);
        if (mxl_fail(ret))
                goto fail;
 
@@ -798,6 +797,9 @@ static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
        case MxL_5007_V2_200_F2:
                name = "MxL5007.v2.200.f2";
                break;
+       case MxL_5007_V4:
+               name = "MxL5007T.v4";
+               break;
        default:
                name = "MxL5007T";
                printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
@@ -870,7 +872,7 @@ EXPORT_SYMBOL_GPL(mxl5007t_attach);
 MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
 MODULE_LICENSE("GPL");
-MODULE_VERSION("0.1");
+MODULE_VERSION("0.2");
 
 /*
  * Overrides for Emacs so that we follow Linus's tabbing style.