]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
avr32: Allow fine-grained control over LCDC pins
authorJulien May <julien.may@miromico.ch>
Mon, 4 Aug 2008 12:27:38 +0000 (14:27 +0200)
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Mon, 22 Sep 2008 07:51:01 +0000 (09:51 +0200)
This replaces the pin_config param with an u64 pin_mask in
at32_add_device_lcdc, allowing a board-maintainer to indivually select
specific lcdc pins.

Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Julien May <jmay@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
arch/avr32/boards/atstk1000/atstk1002.c
arch/avr32/boards/atstk1000/atstk1004.c
arch/avr32/mach-at32ap/at32ap700x.c
arch/avr32/mach-at32ap/include/mach/at32ap700x.h
arch/avr32/mach-at32ap/include/mach/board.h

index dfc3443e23aa3df4cb0033c579a5f7a3d4679623..cccca241fae93a6209c61121957b2be66011c7e0 100644 (file)
@@ -332,7 +332,8 @@ static int __init atstk1002_init(void)
        set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
 #else
        at32_add_device_lcdc(0, &atstk1000_lcdc_data,
-                            fbmem_start, fbmem_size, 0);
+                            fbmem_start, fbmem_size,
+                            ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
 #endif
        at32_add_device_usba(0, NULL);
 #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
index 50a5273e5916ddc285d5be2e3604a3b3df6c76d7..2c072cd0c22ee2f5c450a12a05f319fa895cf6a2 100644 (file)
@@ -140,7 +140,8 @@ static int __init atstk1004_init(void)
        at32_add_device_mci(0, NULL);
 #endif
        at32_add_device_lcdc(0, &atstk1000_lcdc_data,
-                            fbmem_start, fbmem_size, 0);
+                            fbmem_start, fbmem_size,
+                            ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
        at32_add_device_usba(0, NULL);
 #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
        at32_add_device_ssc(0, ATMEL_SSC_TX);
index e01dbe4ebb404fdeda8dd29b38d666908ff426bc..c28dd172f627183c464139c5390308d6c461051d 100644 (file)
@@ -1353,13 +1353,14 @@ static struct clk atmel_lcdfb0_pixclk = {
 struct platform_device *__init
 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
                     unsigned long fbmem_start, unsigned long fbmem_len,
-                    unsigned int pin_config)
+                    u64 pin_mask)
 {
        struct platform_device *pdev;
        struct atmel_lcdfb_info *info;
        struct fb_monspecs *monspecs;
        struct fb_videomode *modedb;
        unsigned int modedb_size;
+       int i;
 
        /*
         * Do a deep copy of the fb data, monspecs and modedb. Make
@@ -1381,75 +1382,29 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
        case 0:
                pdev = &atmel_lcdfb0_device;
 
-               switch (pin_config) {
-               case 0:
-                       select_peripheral(PC(19), PERIPH_A, 0); /* CC     */
-                       select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
-                       select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
-                       select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
-                       select_peripheral(PC(23), PERIPH_A, 0); /* DVAL   */
-                       select_peripheral(PC(24), PERIPH_A, 0); /* MODE   */
-                       select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
-                       select_peripheral(PC(26), PERIPH_A, 0); /* DATA0  */
-                       select_peripheral(PC(27), PERIPH_A, 0); /* DATA1  */
-                       select_peripheral(PC(28), PERIPH_A, 0); /* DATA2  */
-                       select_peripheral(PC(29), PERIPH_A, 0); /* DATA3  */
-                       select_peripheral(PC(30), PERIPH_A, 0); /* DATA4  */
-                       select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
-                       select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
-                       select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
-                       select_peripheral(PD(2),  PERIPH_A, 0); /* DATA8  */
-                       select_peripheral(PD(3),  PERIPH_A, 0); /* DATA9  */
-                       select_peripheral(PD(4),  PERIPH_A, 0); /* DATA10 */
-                       select_peripheral(PD(5),  PERIPH_A, 0); /* DATA11 */
-                       select_peripheral(PD(6),  PERIPH_A, 0); /* DATA12 */
-                       select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
-                       select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
-                       select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
-                       select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
-                       select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
-                       select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
-                       select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
-                       select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
-                       select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
-                       select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
-                       select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
-                       break;
-               case 1:
-                       select_peripheral(PE(0),  PERIPH_B, 0); /* CC     */
-                       select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
-                       select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
-                       select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
-                       select_peripheral(PE(1),  PERIPH_B, 0); /* DVAL   */
-                       select_peripheral(PE(2),  PERIPH_B, 0); /* MODE   */
-                       select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
-                       select_peripheral(PE(3),  PERIPH_B, 0); /* DATA0  */
-                       select_peripheral(PE(4),  PERIPH_B, 0); /* DATA1  */
-                       select_peripheral(PE(5),  PERIPH_B, 0); /* DATA2  */
-                       select_peripheral(PE(6),  PERIPH_B, 0); /* DATA3  */
-                       select_peripheral(PE(7),  PERIPH_B, 0); /* DATA4  */
-                       select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
-                       select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
-                       select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
-                       select_peripheral(PE(8),  PERIPH_B, 0); /* DATA8  */
-                       select_peripheral(PE(9),  PERIPH_B, 0); /* DATA9  */
-                       select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */
-                       select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */
-                       select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */
-                       select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
-                       select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
-                       select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
-                       select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */
-                       select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */
-                       select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */
-                       select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */
-                       select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */
-                       select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */
-                       select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
-                       select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
-                       break;
-               default:
-                       goto err_invalid_id;
+               if (pin_mask == 0ULL)
+                       /* Default to "full" lcdc control signals and 24bit */
+                       pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
+
+               /* LCDC on port C */
+               for (i = 19; i < 32; i++) {
+                       if (pin_mask & (1ULL << i))
+                               at32_select_periph(GPIO_PIOC_BASE + i,
+                                               GPIO_PERIPH_A, 0);
+               }
+
+               /* LCDC on port D */
+               for (i = 0; i < 18; i++) {
+                       if (pin_mask & (1ULL << i))
+                               at32_select_periph(GPIO_PIOD_BASE + i,
+                                               GPIO_PERIPH_A, 0);
+               }
+
+               /* LCDC on port E */
+               for (i = 0; i < 19; i++) {
+                       if (pin_mask & (1ULL << (i + 32)))
+                               at32_select_periph(GPIO_PIOE_BASE + i,
+                                               GPIO_PERIPH_B, 0);
                }
 
                clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
index 1e9852d65ccaf04256dc96df8968984c772e692a..a77d372f6f3ea8660ffeec96cc31b52381a04b77 100644 (file)
 #define HMATRIX_BASE   0xfff00800
 #define SDRAMC_BASE    0xfff03800
 
+/* LCDC on port C */
+#define ATMEL_LCDC_PC_CC       (1ULL << 19)
+#define ATMEL_LCDC_PC_HSYNC    (1ULL << 20)
+#define ATMEL_LCDC_PC_PCLK     (1ULL << 21)
+#define ATMEL_LCDC_PC_VSYNC    (1ULL << 22)
+#define ATMEL_LCDC_PC_DVAL     (1ULL << 23)
+#define ATMEL_LCDC_PC_MODE     (1ULL << 24)
+#define ATMEL_LCDC_PC_PWR      (1ULL << 25)
+#define ATMEL_LCDC_PC_DATA0    (1ULL << 26)
+#define ATMEL_LCDC_PC_DATA1    (1ULL << 27)
+#define ATMEL_LCDC_PC_DATA2    (1ULL << 28)
+#define ATMEL_LCDC_PC_DATA3    (1ULL << 29)
+#define ATMEL_LCDC_PC_DATA4    (1ULL << 30)
+#define ATMEL_LCDC_PC_DATA5    (1ULL << 31)
+
+/* LCDC on port D */
+#define ATMEL_LCDC_PD_DATA6    (1ULL << 0)
+#define ATMEL_LCDC_PD_DATA7    (1ULL << 1)
+#define ATMEL_LCDC_PD_DATA8    (1ULL << 2)
+#define ATMEL_LCDC_PD_DATA9    (1ULL << 3)
+#define ATMEL_LCDC_PD_DATA10   (1ULL << 4)
+#define ATMEL_LCDC_PD_DATA11   (1ULL << 5)
+#define ATMEL_LCDC_PD_DATA12   (1ULL << 6)
+#define ATMEL_LCDC_PD_DATA13   (1ULL << 7)
+#define ATMEL_LCDC_PD_DATA14   (1ULL << 8)
+#define ATMEL_LCDC_PD_DATA15   (1ULL << 9)
+#define ATMEL_LCDC_PD_DATA16   (1ULL << 10)
+#define ATMEL_LCDC_PD_DATA17   (1ULL << 11)
+#define ATMEL_LCDC_PD_DATA18   (1ULL << 12)
+#define ATMEL_LCDC_PD_DATA19   (1ULL << 13)
+#define ATMEL_LCDC_PD_DATA20   (1ULL << 14)
+#define ATMEL_LCDC_PD_DATA21   (1ULL << 15)
+#define ATMEL_LCDC_PD_DATA22   (1ULL << 16)
+#define ATMEL_LCDC_PD_DATA23   (1ULL << 17)
+
+/* LCDC on port E */
+#define ATMEL_LCDC_PE_CC       (1ULL << (32 + 0))
+#define ATMEL_LCDC_PE_DVAL     (1ULL << (32 + 1))
+#define ATMEL_LCDC_PE_MODE     (1ULL << (32 + 2))
+#define ATMEL_LCDC_PE_DATA0    (1ULL << (32 + 3))
+#define ATMEL_LCDC_PE_DATA1    (1ULL << (32 + 4))
+#define ATMEL_LCDC_PE_DATA2    (1ULL << (32 + 5))
+#define ATMEL_LCDC_PE_DATA3    (1ULL << (32 + 6))
+#define ATMEL_LCDC_PE_DATA4    (1ULL << (32 + 7))
+#define ATMEL_LCDC_PE_DATA8    (1ULL << (32 + 8))
+#define ATMEL_LCDC_PE_DATA9    (1ULL << (32 + 9))
+#define ATMEL_LCDC_PE_DATA10   (1ULL << (32 + 10))
+#define ATMEL_LCDC_PE_DATA11   (1ULL << (32 + 11))
+#define ATMEL_LCDC_PE_DATA12   (1ULL << (32 + 12))
+#define ATMEL_LCDC_PE_DATA16   (1ULL << (32 + 13))
+#define ATMEL_LCDC_PE_DATA17   (1ULL << (32 + 14))
+#define ATMEL_LCDC_PE_DATA18   (1ULL << (32 + 15))
+#define ATMEL_LCDC_PE_DATA19   (1ULL << (32 + 16))
+#define ATMEL_LCDC_PE_DATA20   (1ULL << (32 + 17))
+#define ATMEL_LCDC_PE_DATA21   (1ULL << (32 + 18))
+
+
+#define ATMEL_LCDC(PORT, PIN)  (ATMEL_LCDC_##PORT##_##PIN)
+
+
+#define ATMEL_LCDC_PRI_24B_DATA        (                                       \
+               ATMEL_LCDC(PC, DATA0)  | ATMEL_LCDC(PC, DATA1)  |       \
+               ATMEL_LCDC(PC, DATA2)  | ATMEL_LCDC(PC, DATA3)  |       \
+               ATMEL_LCDC(PC, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+               ATMEL_LCDC(PD, DATA6)  | ATMEL_LCDC(PD, DATA7)  |       \
+               ATMEL_LCDC(PD, DATA8)  | ATMEL_LCDC(PD, DATA9)  |       \
+               ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) |       \
+               ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) |       \
+               ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) |       \
+               ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) |       \
+               ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) |       \
+               ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) |       \
+               ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
+
+#define ATMEL_LCDC_ALT_24B_DATA (                                      \
+               ATMEL_LCDC(PE, DATA0)  | ATMEL_LCDC(PE, DATA1)  |       \
+               ATMEL_LCDC(PE, DATA2)  | ATMEL_LCDC(PE, DATA3)  |       \
+               ATMEL_LCDC(PE, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+               ATMEL_LCDC(PD, DATA6)  | ATMEL_LCDC(PD, DATA7)  |       \
+               ATMEL_LCDC(PE, DATA8)  | ATMEL_LCDC(PE, DATA9)  |       \
+               ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) |       \
+               ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) |       \
+               ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) |       \
+               ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) |       \
+               ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) |       \
+               ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) |       \
+               ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
+
+#define ATMEL_LCDC_PRI_15B_DATA (                                      \
+               ATMEL_LCDC(PC, DATA0)  | ATMEL_LCDC(PC, DATA1)  |       \
+               ATMEL_LCDC(PC, DATA2)  | ATMEL_LCDC(PC, DATA3)  |       \
+               ATMEL_LCDC(PC, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+               ATMEL_LCDC(PD, DATA8)  | ATMEL_LCDC(PD, DATA9)  |       \
+               ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) |       \
+               ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA16) |       \
+               ATMEL_LCDC(PD, DATA17) | ATMEL_LCDC(PD, DATA18) |       \
+               ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20))
+
+#define ATMEL_LCDC_ALT_15B_DATA        (                                       \
+               ATMEL_LCDC(PE, DATA0)  | ATMEL_LCDC(PE, DATA1)  |       \
+               ATMEL_LCDC(PE, DATA2)  | ATMEL_LCDC(PE, DATA3)  |       \
+               ATMEL_LCDC(PE, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+               ATMEL_LCDC(PE, DATA8)  | ATMEL_LCDC(PE, DATA9)  |       \
+               ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) |       \
+               ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PE, DATA16) |       \
+               ATMEL_LCDC(PE, DATA17) | ATMEL_LCDC(PE, DATA18) |       \
+               ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20))
+
+#define ATMEL_LCDC_PRI_CONTROL (                                       \
+               ATMEL_LCDC(PC, CC)   | ATMEL_LCDC(PC, DVAL) |           \
+               ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
+
+#define ATMEL_LCDC_ALT_CONTROL (                                       \
+               ATMEL_LCDC(PE, CC)   | ATMEL_LCDC(PE, DVAL) |           \
+               ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
+
+#define ATMEL_LCDC_CONTROL (                                           \
+               ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) |         \
+               ATMEL_LCDC(PC, PCLK))
+
+#define ATMEL_LCDC_PRI_24BIT   (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
+
+#define ATMEL_LCDC_ALT_24BIT   (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
+
+#define ATMEL_LCDC_PRI_15BIT   (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
+
+#define ATMEL_LCDC_ALT_15BIT   (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
+
 #endif /* __ASM_ARCH_AT32AP700X_H__ */
index e60e9076544d08ace7891dbe1d1ffbf31df4f45f..c48386d66bc38f9fb0c1e287748b6de16a8ac903 100644 (file)
@@ -43,7 +43,7 @@ struct atmel_lcdfb_info;
 struct platform_device *
 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
                     unsigned long fbmem_start, unsigned long fbmem_len,
-                    unsigned int pin_config);
+                    u64 pin_mask);
 
 struct usba_platform_data;
 struct platform_device *