DMA: Added utility APIs for setting DMA global parameters

Added DMA utility APIs for setting FIFO depth, arbitration rate and channel priority.
This patch depends on patch [2/4] "OMAP: DMA: Added support for OMAP3".

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b97a9594e9e55bf564eaadc7a81c74bd43949492..48f6e75d5c285871e5e5ce05408399a1ac2b8dc3 100644 (file)
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -289,6 +289,9 @@ void omap_set_dma_params(int lch, struct omap_dma_channel_params * params)
        omap_set_dma_dest_params(lch, params->dst_port,
                                 params->dst_amode, params->dst_start,
                                 params->dst_ei, params->dst_fi);
+       if (params->read_prio || params->write_prio)
+               omap_dma_set_prio_lch(lch, params->read_prio,
+                                     params->write_prio);
 }
 
 void omap_set_dma_src_index(int lch, int eidx, int fidx)
@@ -608,6 +611,67 @@ void omap_free_dma(int lch)
        }
 }
 
+/**
+ * @brief omap_dma_set_global_params : Set global priority settings for dma
+ *
+ * @param arb_rate
+ * @param max_fifo_depth
+ * @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM
+ *                                                 DMA_THREAD_RESERVE_ONET
+ *                                                 DMA_THREAD_RESERVE_TWOT
+ *                                                 DMA_THREAD_RESERVE_THREET
+ */
+void
+omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
+{
+       u32 reg;
+
+       if (!cpu_class_is_omap2()) {
+               printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __FUNCTION__);
+               return;
+       }
+
+       if (arb_rate == 0)
+               arb_rate = 1;
+
+       reg = (arb_rate & 0xff) << 16;
+       reg |= (0xff & max_fifo_depth);
+
+       omap_writel(reg, OMAP_DMA4_GCR_REG);
+}
+EXPORT_SYMBOL(omap_dma_set_global_params);
+
+/**
+ * @brief omap_dma_set_prio_lch : Set channel wise priority settings
+ *
+ * @param lch
+ * @param read_prio - Read priority
+ * @param write_prio - Write priority
+ * Both of the above can be set with one of the following values :
+ *     DMA_CH_PRIO_HIGH/DMA_CH_PRIO_LOW
+ */
+int
+omap_dma_set_prio_lch(int lch, unsigned char read_prio,
+                     unsigned char write_prio)
+{
+       u32 w;
+
+       if (unlikely((lch < 0 || lch >= OMAP_LOGICAL_DMA_CH_COUNT))) {
+               printk(KERN_ERR "Invalid channel id\n");
+               return -EINVAL;
+       }
+       w = OMAP_DMA_CCR_REG(lch);
+       w &= ~((1 << 6) | (1 << 26));
+       if (cpu_is_omap2430() || cpu_is_omap34xx())
+               w |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
+       else
+               w |= ((read_prio & 0x1) << 6);
+
+       OMAP_DMA_CCR_REG(lch) = w;
+       return 0;
+}
+EXPORT_SYMBOL(omap_dma_set_prio_lch);
+
 /*
  * Clears any DMA state so the DMA engine is ready to restart with new buffers
  * through omap_start_dma(). Any buffers in flight are discarded.
@@ -1428,6 +1492,10 @@ static int __init omap_init_dma(void)
                }
        }
 
+       if (cpu_is_omap2430() || cpu_is_omap34xx())
+               omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
+                               DMA_DEFAULT_FIFO_DEPTH, 0);
+
        if (cpu_class_is_omap2())
                setup_irq(INT_24XX_SDMA_IRQ0, &omap24xx_dma_irq);
 

diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h
index 8868397f2c5267592e0d9a2f3d236bb2ca517027..f346d3c8294cac0281b58b138b2ed252b481f0c0 100644 (file)
--- a/include/asm-arm/arch-omap/dma.h
+++ b/include/asm-arm/arch-omap/dma.h
@@ -315,6 +315,21 @@
 #define OMAP_DMA_AMODE_SINGLE_IDX      0x02
 #define OMAP_DMA_AMODE_DOUBLE_IDX      0x03
 
+#define DMA_DEFAULT_FIFO_DEPTH         0x10
+#define DMA_DEFAULT_ARB_RATE           0x01
+/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
+#define DMA_THREAD_RESERVE_NORM                (0x00 << 12) /* Def */
+#define DMA_THREAD_RESERVE_ONET                (0x01 << 12)
+#define DMA_THREAD_RESERVE_TWOT                (0x02 << 12)
+#define DMA_THREAD_RESERVE_THREET      (0x03 << 12)
+#define DMA_THREAD_FIFO_NONE           (0x00 << 14) /* Def */
+#define DMA_THREAD_FIFO_75             (0x01 << 14)
+#define DMA_THREAD_FIFO_25             (0x02 << 14)
+#define DMA_THREAD_FIFO_50             (0x03 << 14)
+
+#define DMA_CH_PRIO_HIGH               0x1
+#define DMA_CH_PRIO_LOW                        0x0 /* Def */
+
 /* LCD DMA block numbers */
 enum {
        OMAP_LCD_DMA_B1_TOP,
@@ -364,6 +379,9 @@ struct omap_dma_channel_params {
        int src_or_dst_synch;   /* source synch(1) or destination synch(0) */
 
        int ie;                 /* interrupt enabled */
+
+       unsigned char read_prio;/* read priority */
+       unsigned char write_prio;/* write priority */
 };
 
 
@@ -414,6 +432,10 @@ extern dma_addr_t omap_get_dma_dst_pos(int lch);
 extern int omap_get_dma_src_addr_counter(int lch);
 extern void omap_clear_dma(int lch);
 extern int omap_dma_running(void);
+extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
+                                      int tparams);
+extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
+                                unsigned char write_prio);
 
 /* LCD DMA functions */
 extern int omap_request_lcd_dma(void (* callback)(u16 status, void *data),