]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[MIPS] Check FCSR for pending interrupts before restoring from a context.
authorChris Dearman <chris@mips.com>
Thu, 1 Feb 2007 19:54:13 +0000 (19:54 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 6 Feb 2007 16:53:23 +0000 (16:53 +0000)
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/r4k_fpu.S

index 880fa6e841ee95f678993fb5dd17138f62f5af22..8b5ccfa99dd1b9358a64f2fbe4512c54ee651daa 100644 (file)
@@ -114,6 +114,14 @@ LEAF(_save_fp_context32)
  */
 LEAF(_restore_fp_context)
        EX      lw t0, SC_FPC_CSR(a0)
+
+       /* Fail if the CSR has exceptions pending */
+       srl     t1, t0, 5
+       and     t1, t0
+       andi    t1, 0x1f << 7
+       bnez    t1, fault
+        nop
+
 #ifdef CONFIG_64BIT
        EX      ldc1 $f1, SC_FPREGS+8(a0)
        EX      ldc1 $f3, SC_FPREGS+24(a0)
@@ -157,6 +165,14 @@ LEAF(_restore_fp_context)
 LEAF(_restore_fp_context32)
        /* Restore an o32 sigcontext.  */
        EX      lw t0, SC32_FPC_CSR(a0)
+
+       /* Fail if the CSR has exceptions pending */
+       srl     t1, t0, 5
+       and     t1, t0
+       andi    t1, 0x1f << 7
+       bnez    t1, fault
+        nop
+
        EX      ldc1 $f0, SC32_FPREGS+0(a0)
        EX      ldc1 $f2, SC32_FPREGS+16(a0)
        EX      ldc1 $f4, SC32_FPREGS+32(a0)