Default MUX configuration added - GPIO140-143, GPIO0 and GPIO9

Default MUX configurations for GPIO on OMAP3 EVM boards are added.
Fixed for "_UP" naming convention for GPIOs comment.

Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index dacb41f130c077f5c7d205e02bcde051051e00e3..1556688901dc9e3c4e05dd25e30900361418487b 100644 (file)
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -459,6 +459,19 @@ MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AE6_34XX_GPIO141", 0x16e,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+MUX_CFG_34XX("AF5_34XX_GPIO142", 0x170,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+MUX_CFG_34XX("AE5_34XX_GPIO143", 0x172,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+
 };
 
 #define OMAP34XX_PINS_SZ       ARRAY_SIZE(omap34xx_pins)

diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index f4362b8682c7a01f134a3f53109af4d6ca9ea593..67fddec3ec09ef82cc4961937bc16f472c5b6760 100644 (file)
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -790,6 +790,12 @@ enum omap34xx_index {
         */
        AH8_34XX_GPIO29,
        J25_34XX_GPIO170,
+       AF26_34XX_GPIO0,
+       AF22_34XX_GPIO9,
+       AF6_34XX_GPIO140_UP,
+       AE6_34XX_GPIO141,
+       AF5_34XX_GPIO142,
+       AE5_34XX_GPIO143
 };
 
 struct omap_mux_cfg {