]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
ARM: OMAP3: Fix get_irqnr_and_base to clear spurious interrupt bits
authorTony Lindgren <tony@atomide.com>
Tue, 21 Oct 2008 17:51:40 +0000 (10:51 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 21 Oct 2008 22:06:40 +0000 (15:06 -0700)
On omap24xx, INTCPS_SIR_IRQ_OFFSET bits [6:0] contains the current
active interrupt number.

However, on 34xx INTCPS_SIR_IRQ_OFFSET bits [31:7] also contains the
SPURIOUSIRQFLAG, which gets set if the interrupt sorting information
is invalid.

If the SPURIOUSIRQFLAG bits are not ignored, the interrupt code will
occasionally produce a bunch of confusing errors:

irq -33, desc: c02ddcc8, depth: 0, count: 0, unhandled: 0
->handle_irq():  c006f23c, handle_bad_irq+0x0/0x22c
->chip(): 00000000, 0x0
->action(): 00000000

Fix this by masking out only the ACTIVEIRQ bits. Also fix a
confusing comment.

Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/include/mach/entry-macro.S

index a8fca9d9845b00102ba036958736452a78b89a54..47aa62c333e932c0f90bb236f74e3b7fe067c69b 100644 (file)
@@ -65,7 +65,8 @@
 #include <mach/omap34xx.h>
 #endif
 
-#define INTCPS_SIR_IRQ_OFFSET  0x0040          /* Active interrupt number */
+#define INTCPS_SIR_IRQ_OFFSET  0x0040          /* Active interrupt offset */
+#define        ACTIVEIRQ_MASK          0x7f            /* Active interrupt bits */
 
                .macro  disable_fiq
                .endm
@@ -88,6 +89,7 @@
                cmp     \irqnr, #0x0
 2222:
                ldrne   \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
+               and     \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
 
                .endm