]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
KVM: SVM: support writing 0 to K8 performance counter control registers
authorJoerg Roedel <joerg.roedel@amd.com>
Tue, 11 Dec 2007 14:36:57 +0000 (15:36 +0100)
committerAvi Kivity <avi@qumranet.com>
Wed, 30 Jan 2008 15:53:22 +0000 (17:53 +0200)
This lets SVM ignore writes of the value 0 to the performance counter control
registers.  Thus enabling them will still fail in the guest, but a write of 0
which keeps them disabled is accepted.  This is required to boot Windows
Vista 64bit.

[avi: avoid fall-thru in switch statement]

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Markus Rechberger <markus.rechberger@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
drivers/kvm/svm.c

index 442ca818c5a9f562983a28254dbd1bab351712f8..ef21804a5c5c251098448f6153676951deaf94ff 100644 (file)
@@ -1155,7 +1155,20 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
        case MSR_IA32_SYSENTER_ESP:
                svm->vmcb->save.sysenter_esp = data;
                break;
+       case MSR_K7_EVNTSEL0:
+       case MSR_K7_EVNTSEL1:
+       case MSR_K7_EVNTSEL2:
+       case MSR_K7_EVNTSEL3:
+               /*
+                * only support writing 0 to the performance counters for now
+                * to make Windows happy. Should be replaced by a real
+                * performance counter emulation later.
+                */
+               if (data != 0)
+                       goto unhandled;
+               break;
        default:
+       unhandled:
                return kvm_set_msr_common(vcpu, ecx, data);
        }
        return 0;