]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[net] Gracefully handle shared e1000/1000e driver PCI ID's
authorLinus Torvalds <torvalds@linux-foundation.org>
Wed, 30 Jan 2008 13:30:15 +0000 (00:30 +1100)
committerLinus Torvalds <torvalds@linux-foundation.org>
Wed, 30 Jan 2008 13:30:15 +0000 (00:30 +1100)
Both the old e1000 driver and the new e1000e driver can drive some
PCI-Express e1000 cards, and we should avoid ambiguity about which
driver will pick up the support for those cards when both drivers are
enabled.

This solves the problem by having the old driver support those cards if
the new driver isn't configured, but otherwise ceding support for PCI
Express versions of the e1000 chipset to the newer driver.  Thus
allowing both legacy configurations where only the old driver is active
(and handles all chips it knows about) and the new configuration with
the new driver handling the more modern PCIE variants.

Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/net/Kconfig
drivers/net/e1000/e1000_main.c

index 5a2d1dd487f665c9c4c82216703fc3ca9cb0ef6f..6c575403bd39baa739654b81f9bb35b1e01e7a37 100644 (file)
@@ -1992,7 +1992,7 @@ config E1000_DISABLE_PACKET_SPLIT
 
 config E1000E
        tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"
-       depends on PCI && EXPERIMENTAL
+       depends on PCI
        ---help---
          This driver supports the PCI-Express Intel(R) PRO/1000 gigabit
          ethernet family of adapters. For PCI or PCI-X e1000 adapters,
@@ -2009,6 +2009,9 @@ config E1000E
          To compile this driver as a module, choose M here. The module
          will be called e1000e.
 
+config E1000E_ENABLED
+       def_bool E1000E != n
+
 config IP1000
        tristate "IP1000 Gigabit Ethernet support"
        depends on PCI && EXPERIMENTAL
index 3111af6cdc8a708071ea16b34451266c76baee29..8c87940a9ce86341eacda17d1a3ad94106e32921 100644 (file)
@@ -47,6 +47,12 @@ static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation
  * Macro expands to...
  *   {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  */
+#ifdef CONFIG_E1000E_ENABLED
+  #define PCIE(x) 
+#else
+  #define PCIE(x) x,
+#endif
+
 static struct pci_device_id e1000_pci_tbl[] = {
        INTEL_E1000_ETHERNET_DEVICE(0x1000),
        INTEL_E1000_ETHERNET_DEVICE(0x1001),
@@ -73,14 +79,14 @@ static struct pci_device_id e1000_pci_tbl[] = {
        INTEL_E1000_ETHERNET_DEVICE(0x1026),
        INTEL_E1000_ETHERNET_DEVICE(0x1027),
        INTEL_E1000_ETHERNET_DEVICE(0x1028),
-       INTEL_E1000_ETHERNET_DEVICE(0x1049),
-       INTEL_E1000_ETHERNET_DEVICE(0x104A),
-       INTEL_E1000_ETHERNET_DEVICE(0x104B),
-       INTEL_E1000_ETHERNET_DEVICE(0x104C),
-       INTEL_E1000_ETHERNET_DEVICE(0x104D),
-       INTEL_E1000_ETHERNET_DEVICE(0x105E),
-       INTEL_E1000_ETHERNET_DEVICE(0x105F),
-       INTEL_E1000_ETHERNET_DEVICE(0x1060),
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x1049))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x104A))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x104B))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x104C))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x104D))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x105E))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x105F))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x1060))
        INTEL_E1000_ETHERNET_DEVICE(0x1075),
        INTEL_E1000_ETHERNET_DEVICE(0x1076),
        INTEL_E1000_ETHERNET_DEVICE(0x1077),
@@ -89,28 +95,28 @@ static struct pci_device_id e1000_pci_tbl[] = {
        INTEL_E1000_ETHERNET_DEVICE(0x107A),
        INTEL_E1000_ETHERNET_DEVICE(0x107B),
        INTEL_E1000_ETHERNET_DEVICE(0x107C),
-       INTEL_E1000_ETHERNET_DEVICE(0x107D),
-       INTEL_E1000_ETHERNET_DEVICE(0x107E),
-       INTEL_E1000_ETHERNET_DEVICE(0x107F),
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x107D))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x107E))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x107F))
        INTEL_E1000_ETHERNET_DEVICE(0x108A),
-       INTEL_E1000_ETHERNET_DEVICE(0x108B),
-       INTEL_E1000_ETHERNET_DEVICE(0x108C),
-       INTEL_E1000_ETHERNET_DEVICE(0x1096),
-       INTEL_E1000_ETHERNET_DEVICE(0x1098),
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x108B))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x108C))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x1096))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x1098))
        INTEL_E1000_ETHERNET_DEVICE(0x1099),
-       INTEL_E1000_ETHERNET_DEVICE(0x109A),
-       INTEL_E1000_ETHERNET_DEVICE(0x10A4),
-       INTEL_E1000_ETHERNET_DEVICE(0x10A5),
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x109A))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10A4))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10A5))
        INTEL_E1000_ETHERNET_DEVICE(0x10B5),
-       INTEL_E1000_ETHERNET_DEVICE(0x10B9),
-       INTEL_E1000_ETHERNET_DEVICE(0x10BA),
-       INTEL_E1000_ETHERNET_DEVICE(0x10BB),
-       INTEL_E1000_ETHERNET_DEVICE(0x10BC),
-       INTEL_E1000_ETHERNET_DEVICE(0x10C4),
-       INTEL_E1000_ETHERNET_DEVICE(0x10C5),
-       INTEL_E1000_ETHERNET_DEVICE(0x10D5),
-       INTEL_E1000_ETHERNET_DEVICE(0x10D9),
-       INTEL_E1000_ETHERNET_DEVICE(0x10DA),
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10B9))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10BA))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10BB))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10BC))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10C4))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10C5))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10D5))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10D9))
+PCIE(  INTEL_E1000_ETHERNET_DEVICE(0x10DA))
        /* required last entry */
        {0,}
 };