]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
MX2 add support for mx2 in i.MX serial driver
authorSascha Hauer <s.hauer@pengutronix.de>
Sat, 5 Jul 2008 08:02:58 +0000 (10:02 +0200)
committerRobert Schwebel <r.schwebel@pengutronix.de>
Sat, 5 Jul 2008 08:02:58 +0000 (10:02 +0200)
add support for mx2 in i.MX serial driver

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/arm/mach-mx2/Makefile
arch/arm/mach-mx2/serial.c [new file with mode: 0644]
drivers/serial/imx.c

index db4d9c6f273808e8f0ab44500640d49bfb90a573..f8f8ecb01c9713b5b6b589699487de60889bc209 100644 (file)
@@ -4,4 +4,4 @@
 
 # Object file lists.
 
-obj-y  :=  system.o generic.o devices.o
+obj-y  :=  system.o generic.o devices.o serial.o
diff --git a/arch/arm/mach-mx2/serial.c b/arch/arm/mach-mx2/serial.c
new file mode 100644 (file)
index 0000000..570c02b
--- /dev/null
@@ -0,0 +1,177 @@
+/*
+ * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <asm/hardware.h>
+#include <asm/arch/imx-uart.h>
+
+static struct resource uart0[] = {
+       {
+               .start = UART1_BASE_ADDR,
+               .end = UART1_BASE_ADDR + 0x0B5,
+               .flags = IORESOURCE_MEM,
+       }, {
+               .start = MXC_INT_UART1,
+               .end = MXC_INT_UART1,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device mxc_uart_device0 = {
+       .name = "imx-uart",
+       .id = 0,
+       .resource = uart0,
+       .num_resources = ARRAY_SIZE(uart0),
+};
+
+static struct resource uart1[] = {
+       {
+               .start = UART2_BASE_ADDR,
+               .end = UART2_BASE_ADDR + 0x0B5,
+               .flags = IORESOURCE_MEM,
+       }, {
+               .start = MXC_INT_UART2,
+               .end = MXC_INT_UART2,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device mxc_uart_device1 = {
+       .name = "imx-uart",
+       .id = 1,
+       .resource = uart1,
+       .num_resources = ARRAY_SIZE(uart1),
+};
+
+static struct resource uart2[] = {
+       {
+               .start = UART3_BASE_ADDR,
+               .end = UART3_BASE_ADDR + 0x0B5,
+               .flags = IORESOURCE_MEM,
+       }, {
+               .start = MXC_INT_UART3,
+               .end = MXC_INT_UART3,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device mxc_uart_device2 = {
+       .name = "imx-uart",
+       .id = 2,
+       .resource = uart2,
+       .num_resources = ARRAY_SIZE(uart2),
+};
+
+static struct resource uart3[] = {
+       {
+               .start = UART4_BASE_ADDR,
+               .end = UART4_BASE_ADDR + 0x0B5,
+               .flags = IORESOURCE_MEM,
+       }, {
+               .start = MXC_INT_UART4,
+               .end = MXC_INT_UART4,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device mxc_uart_device3 = {
+       .name = "imx-uart",
+       .id = 3,
+       .resource = uart3,
+       .num_resources = ARRAY_SIZE(uart3),
+};
+
+static struct resource uart4[] = {
+       {
+               .start = UART5_BASE_ADDR,
+               .end = UART5_BASE_ADDR + 0x0B5,
+               .flags = IORESOURCE_MEM,
+       }, {
+               .start = MXC_INT_UART5,
+               .end = MXC_INT_UART5,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device mxc_uart_device4 = {
+       .name = "imx-uart",
+       .id = 4,
+       .resource = uart4,
+       .num_resources = ARRAY_SIZE(uart4),
+};
+
+static struct resource uart5[] = {
+       {
+               .start = UART6_BASE_ADDR,
+               .end = UART6_BASE_ADDR + 0x0B5,
+               .flags = IORESOURCE_MEM,
+       }, {
+               .start = MXC_INT_UART6,
+               .end = MXC_INT_UART6,
+               .flags = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device mxc_uart_device5 = {
+       .name = "imx-uart",
+       .id = 5,
+       .resource = uart5,
+       .num_resources = ARRAY_SIZE(uart5),
+};
+
+/*
+ * Register only those UARTs that physically exists
+ */
+int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata)
+{
+       switch (uart_no) {
+       case 0:
+               mxc_uart_device0.dev.platform_data = pdata;
+               platform_device_register(&mxc_uart_device0);
+               break;
+       case 1:
+               mxc_uart_device1.dev.platform_data = pdata;
+               platform_device_register(&mxc_uart_device1);
+               break;
+#ifndef CONFIG_MXC_IRDA
+       case 2:
+               mxc_uart_device2.dev.platform_data = pdata;
+               platform_device_register(&mxc_uart_device2);
+               break;
+#endif
+       case 3:
+               mxc_uart_device3.dev.platform_data = pdata;
+               platform_device_register(&mxc_uart_device3);
+               break;
+       case 4:
+               mxc_uart_device4.dev.platform_data = pdata;
+               platform_device_register(&mxc_uart_device4);
+               break;
+       case 5:
+               mxc_uart_device5.dev.platform_data = pdata;
+               platform_device_register(&mxc_uart_device5);
+               break;
+       default:
+               return -ENODEV;
+       }
+
+       return 0;
+}
index 549440b098b28ddcb8bd98433ea61fcf0d8fbc37..64acb39a51ba0e939fd6c82810b7ac43450174b9 100644 (file)
@@ -62,7 +62,7 @@
 #define UBIR  0xa4 /* BRM Incremental Register */
 #define UBMR  0xa8 /* BRM Modulator Register */
 #define UBRC  0xac /* Baud Rate Count Register */
-#ifdef CONFIG_ARCH_MX3
+#if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
 #define ONEMS 0xb0 /* One Millisecond register */
 #define UTS   0xb4 /* UART Test Register */
 #endif
@@ -99,7 +99,7 @@
 #ifdef CONFIG_ARCH_IMX
 #define  UCR1_UARTCLKEN  (1<<2)         /* UART clock enabled */
 #endif
-#ifdef CONFIG_ARCH_MX3
+#if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
 #define  UCR1_UARTCLKEN  (0)    /* not present on mx2/mx3 */
 #endif
 #define  UCR1_DOZE       (1<<1)         /* Doze */
 #define MAX_INTERNAL_IRQ       IMX_IRQS
 #endif
 
-#ifdef CONFIG_ARCH_MX3
+#if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
 #define SERIAL_IMX_MAJOR        207
 #define MINOR_START            16
 #define DEV_NAME               "ttymxc"