]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
x86: add pci=check_enable_amd_mmconf and dmi check
authorYinghai Lu <yhlu.kernel@gmail.com>
Mon, 14 Apr 2008 23:08:25 +0000 (16:08 -0700)
committerIngo Molnar <mingo@elte.hu>
Sat, 26 Apr 2008 21:41:04 +0000 (23:41 +0200)
so will disable that feature by default, and only enable that via
pci=check_enable_amd_mmconf or for system match with dmi table.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/kernel/mmconf-fam10h_64.c
arch/x86/kernel/setup_64.c
arch/x86/pci/common.c
arch/x86/pci/mmconfig-shared.c
arch/x86/pci/pci.h

index 37897920ec651cdcd93f418ebdf8dddef641f818..edc5fbfe85c06eb1e2eff8aebdbcf3740b074a63 100644 (file)
@@ -6,12 +6,15 @@
 #include <linux/mm.h>
 #include <linux/string.h>
 #include <linux/pci.h>
+#include <linux/dmi.h>
 #include <asm/pci-direct.h>
 #include <linux/sort.h>
 #include <asm/io.h>
 #include <asm/msr.h>
 #include <asm/acpi.h>
 
+#include "../pci/pci.h"
+
 struct pci_hostbridge_probe {
        u32 bus;
        u32 slot;
@@ -176,6 +179,9 @@ void __cpuinit fam10h_check_enable_mmcfg(void)
        u64 val;
        u32 address;
 
+       if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
+               return;
+
        address = MSR_FAM10H_MMIO_CONF_BASE;
        rdmsrl(address, val);
 
@@ -213,3 +219,25 @@ void __cpuinit fam10h_check_enable_mmcfg(void)
               FAM10H_MMIO_CONF_ENABLE;
        wrmsrl(address, val);
 }
+
+static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d)
+{
+        pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
+        return 0;
+}
+
+static struct dmi_system_id __devinitdata mmconf_dmi_table[] = {
+        {
+                .callback = set_check_enable_amd_mmconf,
+                .ident = "Sun Microsystems Machine",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Sun Microsystems"),
+                },
+        },
+       {}
+};
+
+void __init check_enable_amd_mmconf_dmi(void)
+{
+       dmi_check_system(mmconf_dmi_table);
+}
index d8a9ee752fb3e237c9f8baa1e68edada3013876a..2f5c488aad0b92192c0a38882e824b3d405e7829 100644 (file)
@@ -289,6 +289,18 @@ static void __init parse_setup_data(void)
        }
 }
 
+#ifdef CONFIG_PCI_MMCONFIG
+extern void __cpuinit fam10h_check_enable_mmcfg(void);
+extern void __init check_enable_amd_mmconf_dmi(void);
+#else
+void __cpuinit fam10h_check_enable_mmcfg(void)
+{
+}
+void __init check_enable_amd_mmconf_dmi(void)
+{
+}
+#endif
+
 /*
  * setup_arch - architecture-specific boot-time initializations
  *
@@ -510,6 +522,9 @@ void __init setup_arch(char **cmdline_p)
        conswitchp = &dummy_con;
 #endif
 #endif
+
+       /* do this before identify_cpu for boot cpu */
+       check_enable_amd_mmconf_dmi();
 }
 
 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
@@ -697,14 +712,6 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
                set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
 }
 
-#ifdef CONFIG_PCI_MMCONFIG
-extern void __cpuinit fam10h_check_enable_mmcfg(void);
-#else
-void __cpuinit fam10h_check_enable_mmcfg(void)
-{
-}
-#endif
-
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 {
        unsigned level;
index 07d53184f7a4ad49dcc242f4dc207a17dd37c53f..2a4d751818b731fd1ae0007ed2f1f9a94cdf12d1 100644 (file)
@@ -425,6 +425,10 @@ char * __devinit  pcibios_setup(char *str)
                pci_probe &= ~PCI_PROBE_MMCONF;
                return NULL;
        }
+       else if (!strcmp(str, "check_enable_amd_mmconf")) {
+               pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
+               return NULL;
+       }
 #endif
        else if (!strcmp(str, "noacpi")) {
                acpi_noirq_set();
index bdf62243186a80a3e16e6aa32cb80b276eb2a80c..0cfebecf2a8f128cc2b52f632a95d55eef397fb3 100644 (file)
@@ -107,6 +107,9 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
        int i;
        unsigned segnbits = 0, busnbits;
 
+       if (!(pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF))
+               return NULL;
+
        address = MSR_FAM10H_MMIO_CONF_BASE;
        if (rdmsr_safe(address, &low, &high))
                return NULL;
index c8b89a832c66f760747c73d8195029d46db9f083..8ef86b5c37c85b4e50261700b84be10481ab6c29 100644 (file)
@@ -26,6 +26,7 @@
 #define PCI_ASSIGN_ALL_BUSSES  0x4000
 #define PCI_CAN_SKIP_ISA_ALIGN 0x8000
 #define PCI_USE__CRS           0x10000
+#define PCI_CHECK_ENABLE_AMD_MMCONF    0x20000
 
 extern unsigned int pci_probe;
 extern unsigned long pirq_table_addr;