]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
rtc-twl4030: Fix periodic interrupt
authorJagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
Fri, 5 Sep 2008 09:24:46 +0000 (14:54 +0530)
committerTony Lindgren <tony@atomide.com>
Tue, 9 Sep 2008 17:33:48 +0000 (10:33 -0700)
RTC generates an extra spurious interrupt for every actual periodic
interrupt. This is due to a problem with the RTC_IT bit of
REG_PWR_ISR1. It requires two writes or two reads (when COR is
enabled) to clear it. Since COR is enabled and one read of the same
register is done already (inside twl4030-pwrirq.c do_twl4030_pwrirq()
function), we can do away with a need to add one more write into the
same register inside the interrupt handler, by replacing the write
currently present with just one extra read.

Signed-off-by: Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
drivers/rtc/rtc-twl4030.c

index 98324365a919bc815945a32285de91dd59303a27..98aea0788b7c9e19a70094a87f40c458cd15a1da 100644 (file)
@@ -322,8 +322,13 @@ static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
                                   REG_RTC_STATUS_REG);
        if (res)
                goto out;
-       res = twl4030_i2c_write_u8(TWL4030_MODULE_INT,
-                       PWR_RTC_INT_CLR, REG_PWR_ISR1);
+
+       /* Clear on Read enabled. RTC_IT bit of REG_PWR_ISR1 needs
+        * 2 reads to clear the interrupt. One read is done in
+        * do_twl4030_pwrirq(). Doing the second read, to clear
+        * the bit.
+        */
+       res = twl4030_i2c_read_u8(TWL4030_MODULE_INT, &rd_reg, REG_PWR_ISR1);
        if (res)
                goto out;