]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
amba-pl011, rename BIT macro
authorJiri Slaby <jirislaby@gmail.com>
Fri, 19 Oct 2007 06:40:31 +0000 (23:40 -0700)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Fri, 19 Oct 2007 18:53:42 +0000 (11:53 -0700)
amba-pl011, rename BIT macro

Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/serial/amba-pl011.c

index 72229df9dc111754a74de5b1e3fb4eb896d8768e..40604a092921dac7352161ffeed1820caa11216f 100644 (file)
@@ -263,15 +263,15 @@ static unsigned int pl01x_get_mctrl(struct uart_port *port)
        unsigned int result = 0;
        unsigned int status = readw(uap->port.membase + UART01x_FR);
 
-#define BIT(uartbit, tiocmbit)         \
+#define TIOCMBIT(uartbit, tiocmbit)    \
        if (status & uartbit)           \
                result |= tiocmbit
 
-       BIT(UART01x_FR_DCD, TIOCM_CAR);
-       BIT(UART01x_FR_DSR, TIOCM_DSR);
-       BIT(UART01x_FR_CTS, TIOCM_CTS);
-       BIT(UART011_FR_RI, TIOCM_RNG);
-#undef BIT
+       TIOCMBIT(UART01x_FR_DCD, TIOCM_CAR);
+       TIOCMBIT(UART01x_FR_DSR, TIOCM_DSR);
+       TIOCMBIT(UART01x_FR_CTS, TIOCM_CTS);
+       TIOCMBIT(UART011_FR_RI, TIOCM_RNG);
+#undef TIOCMBIT
        return result;
 }
 
@@ -282,18 +282,18 @@ static void pl011_set_mctrl(struct uart_port *port, unsigned int mctrl)
 
        cr = readw(uap->port.membase + UART011_CR);
 
-#define        BIT(tiocmbit, uartbit)          \
+#define        TIOCMBIT(tiocmbit, uartbit)             \
        if (mctrl & tiocmbit)           \
                cr |= uartbit;          \
        else                            \
                cr &= ~uartbit
 
-       BIT(TIOCM_RTS, UART011_CR_RTS);
-       BIT(TIOCM_DTR, UART011_CR_DTR);
-       BIT(TIOCM_OUT1, UART011_CR_OUT1);
-       BIT(TIOCM_OUT2, UART011_CR_OUT2);
-       BIT(TIOCM_LOOP, UART011_CR_LBE);
-#undef BIT
+       TIOCMBIT(TIOCM_RTS, UART011_CR_RTS);
+       TIOCMBIT(TIOCM_DTR, UART011_CR_DTR);
+       TIOCMBIT(TIOCM_OUT1, UART011_CR_OUT1);
+       TIOCMBIT(TIOCM_OUT2, UART011_CR_OUT2);
+       TIOCMBIT(TIOCM_LOOP, UART011_CR_LBE);
+#undef TIOCMBIT
 
        writew(cr, uap->port.membase + UART011_CR);
 }