]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
rt2x00: Only initialize the minimum needed fields of PCI TX descriptors.
authorGertjan van Wingerde <gwingerde@kpnplanet.nl>
Sat, 10 May 2008 11:44:14 +0000 (13:44 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Thu, 22 May 2008 01:47:33 +0000 (21:47 -0400)
In preparation of replacing the statically allocated data DMA buffers with DMA-mapped
skb's we need to change the TXD handling of the PCI drivers, by moving the programming
of the buffer address fields to the actual TXD writing at TX time, instead of at start-up
time.

Signed-off-by: Gertjan van Wingerde <gwingerde@kpnplanet.nl>
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/rt2x00/rt2400pci.c
drivers/net/wireless/rt2x00/rt2500pci.c
drivers/net/wireless/rt2x00/rt61pci.c

index b4310d798f9466a228aa0cef19c8fb32358116f4..2c0cf394c78ebd8424369858c88ecc26f9fc7507 100644 (file)
@@ -643,15 +643,6 @@ static void rt2400pci_init_txentry(struct rt2x00_dev *rt2x00dev,
        struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
        u32 word;
 
-       rt2x00_desc_read(priv_tx->desc, 1, &word);
-       rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->data_dma);
-       rt2x00_desc_write(priv_tx->desc, 1, word);
-
-       rt2x00_desc_read(priv_tx->desc, 2, &word);
-       rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH,
-                          entry->queue->data_size);
-       rt2x00_desc_write(priv_tx->desc, 2, word);
-
        rt2x00_desc_read(priv_tx->desc, 0, &word);
        rt2x00_set_field32(&word, TXD_W0_VALID, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
@@ -1004,13 +995,19 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
                                    struct txentry_desc *txdesc)
 {
        struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
+       struct queue_entry_priv_pci_tx *entry_priv = skbdesc->entry->priv_data;
        __le32 *txd = skbdesc->desc;
        u32 word;
 
        /*
         * Start writing the descriptor words.
         */
+       rt2x00_desc_read(entry_priv->desc, 1, &word);
+       rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, entry_priv->data_dma);
+       rt2x00_desc_write(entry_priv->desc, 1, word);
+
        rt2x00_desc_read(txd, 2, &word);
+       rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, skbdesc->data_len);
        rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, skbdesc->data_len);
        rt2x00_desc_write(txd, 2, word);
 
index 54aaa8375a2c1f6e806112152cd6e72dac9c5c76..6c31c5db0ca17a999b21a7943ca046d10ccaef17 100644 (file)
@@ -733,10 +733,6 @@ static void rt2500pci_init_txentry(struct rt2x00_dev *rt2x00dev,
        struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
        u32 word;
 
-       rt2x00_desc_read(priv_tx->desc, 1, &word);
-       rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->data_dma);
-       rt2x00_desc_write(priv_tx->desc, 1, word);
-
        rt2x00_desc_read(priv_tx->desc, 0, &word);
        rt2x00_set_field32(&word, TXD_W0_VALID, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
@@ -1158,12 +1154,17 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
                                    struct txentry_desc *txdesc)
 {
        struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
+       struct queue_entry_priv_pci_tx *entry_priv = skbdesc->entry->priv_data;
        __le32 *txd = skbdesc->desc;
        u32 word;
 
        /*
         * Start writing the descriptor words.
         */
+       rt2x00_desc_read(entry_priv->desc, 1, &word);
+       rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, entry_priv->data_dma);
+       rt2x00_desc_write(entry_priv->desc, 1, word);
+
        rt2x00_desc_read(txd, 2, &word);
        rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER);
        rt2x00_set_field32(&word, TXD_W2_AIFS, txdesc->aifs);
index 68d2216131b25a72628806135fc0f137f776f28d..d8e681ec4bb04077a1b60b57997d33bb07b490e2 100644 (file)
@@ -1037,20 +1037,6 @@ static void rt61pci_init_txentry(struct rt2x00_dev *rt2x00dev,
        struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data;
        u32 word;
 
-       rt2x00_desc_read(priv_tx->desc, 1, &word);
-       rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1);
-       rt2x00_desc_write(priv_tx->desc, 1, word);
-
-       rt2x00_desc_read(priv_tx->desc, 5, &word);
-       rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid);
-       rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE, entry->entry_idx);
-       rt2x00_desc_write(priv_tx->desc, 5, word);
-
-       rt2x00_desc_read(priv_tx->desc, 6, &word);
-       rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS,
-                          priv_tx->data_dma);
-       rt2x00_desc_write(priv_tx->desc, 6, word);
-
        rt2x00_desc_read(priv_tx->desc, 0, &word);
        rt2x00_set_field32(&word, TXD_W0_VALID, 0);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0);
@@ -1529,6 +1515,7 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
                                    struct txentry_desc *txdesc)
 {
        struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
+       struct queue_entry_priv_pci_tx *entry_priv = skbdesc->entry->priv_data;
        __le32 *txd = skbdesc->desc;
        u32 word;
 
@@ -1542,6 +1529,7 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
        rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
        rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
        rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
+       rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1);
        rt2x00_desc_write(txd, 1, word);
 
        rt2x00_desc_read(txd, 2, &word);
@@ -1552,11 +1540,19 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
        rt2x00_desc_write(txd, 2, word);
 
        rt2x00_desc_read(txd, 5, &word);
+       rt2x00_set_field32(&word, TXD_W5_PID_TYPE, skbdesc->entry->queue->qid);
+       rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE,
+                          skbdesc->entry->entry_idx);
        rt2x00_set_field32(&word, TXD_W5_TX_POWER,
                           TXPOWER_TO_DEV(rt2x00dev->tx_power));
        rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
        rt2x00_desc_write(txd, 5, word);
 
+       rt2x00_desc_read(txd, 6, &word);
+       rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS,
+                          entry_priv->data_dma);
+       rt2x00_desc_write(txd, 6, word);
+
        if (skbdesc->desc_len > TXINFO_SIZE) {
                rt2x00_desc_read(txd, 11, &word);
                rt2x00_set_field32(&word, TXD_W11_BUFFER_LENGTH0, skbdesc->data_len);