omap: Fix IO_ADDRESS() macros

Modified version of Russell's patch 40c0133a904466ec5423d1088d3c85598ac9e030
to apply to linux-omap tree.

OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies
for use with __raw_{read|write}* for accessing registers.  Therefore,
these macros should return (void __iomem *) cookies, not integer values.

Doing this improves typechecking, and means we can find those places
where, eg, DMA controllers are incorrectly given virtual addresses to
DMA to, or physical addresses are thrown through a virtual to physical
address translation.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 0e25a996bb4c17d65d02231bdb996647e56634f1..4965986b4ad56ee2ec794487ec606b3f670873c9 100644 (file)
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
 
 static struct plat_serial8250_port serial_platform_data[] = {
        {
-               .membase        = (char*)IO_ADDRESS(OMAP_UART1_BASE),
-               .mapbase        = (unsigned long)OMAP_UART1_BASE,
+               .membase        = IO_ADDRESS(OMAP_UART1_BASE),
+               .mapbase        = OMAP_UART1_BASE,
                .irq            = INT_UART1,
                .flags          = UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,
@@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = {
                .uartclk        = OMAP16XX_BASE_BAUD * 16,
        },
        {
-               .membase        = (char*)IO_ADDRESS(OMAP_UART2_BASE),
-               .mapbase        = (unsigned long)OMAP_UART2_BASE,
+               .membase        = IO_ADDRESS(OMAP_UART2_BASE),
+               .mapbase        = OMAP_UART2_BASE,
                .irq            = INT_UART2,
                .flags          = UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,
@@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = {
                .uartclk        = OMAP16XX_BASE_BAUD * 16,
        },
        {
-               .membase        = (char*)IO_ADDRESS(OMAP_UART3_BASE),
-               .mapbase        = (unsigned long)OMAP_UART3_BASE,
+               .membase        = IO_ADDRESS(OMAP_UART3_BASE),
+               .mapbase        = OMAP_UART3_BASE,
                .irq            = INT_UART3,
                .flags          = UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 9d6c916ae3ea66997b4600632ff2a938004f5eef..0eb29e13960a31cafa41201fb5c7f5ed29c84ce4 100644 (file)
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -65,28 +65,28 @@ static struct clk *gpmc_l3_clk;
 
 static void gpmc_write_reg(int idx, u32 val)
 {
-       __raw_writel(val, (__force void __iomem *)(gpmc_base + idx));
+       __raw_writel(val, gpmc_base + idx);
 }
 
 static u32 gpmc_read_reg(int idx)
 {
-       return __raw_readl((__force void __iomem *)(gpmc_base + idx));
+       return __raw_readl(gpmc_base + idx);
 }
 
 void gpmc_cs_write_reg(int cs, int idx, u32 val)
 {
-       u32 reg_addr;
+       void __iomem *reg_addr;
 
        reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
-       __raw_writel(val, (__force void __iomem *)reg_addr);
+       __raw_writel(val, reg_addr);
 }
 
 u32 gpmc_cs_read_reg(int cs, int idx)
 {
-       u32 reg_addr;
+       void __iomem *reg_addr;
 
        reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
-       return __raw_readl((__force void __iomem *)reg_addr);
+       return __raw_readl(reg_addr);
 }
 
 /* TODO: Add support for gpmc_fck to clock framework and use it */
@@ -417,12 +417,12 @@ void __init gpmc_init(void)
        if (cpu_is_omap24xx()) {
                gpmc_l3_clk = clk_get(NULL, "core_l3_ck");
                if (cpu_is_omap2420())
-                       gpmc_base = io_p2v(OMAP2420_GPMC_BASE);
+                       gpmc_base = OMAP2_IO_ADDRESS(OMAP2420_GPMC_BASE);
                else if (cpu_is_omap2430())
-                       gpmc_base = io_p2v(OMAP243X_GPMC_BASE);
+                       gpmc_base = OMAP2_IO_ADDRESS(OMAP243X_GPMC_BASE);
        } else if (cpu_is_omap34xx()) {
                gpmc_l3_clk = clk_get(NULL, "gpmc_fck");
-               gpmc_base = io_p2v(OMAP34XX_GPMC_BASE);
+               gpmc_base = OMAP2_IO_ADDRESS(OMAP34XX_GPMC_BASE);
        }
 
        BUG_ON(IS_ERR(gpmc_l3_clk));

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 82e954a72218e235a7f1cc43ddbdec10d10302ad..4ffb4f19d20dc9336657a953631c2a96cf967cd0 100644 (file)
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -38,7 +38,7 @@
  * for each bank.. when in doubt, consult the TRM.
  */
 static struct omap_irq_bank {
-       unsigned long base_reg;
+       void __iomem *base_reg;
        unsigned int nr_irqs;
 } __attribute__ ((aligned(4))) irq_banks[] = {
        {
@@ -102,7 +102,7 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
        unsigned long tmp;
 
        tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff;
-       printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx "
+       printk(KERN_INFO "IRQ: Found an INTC at 0x%p "
                         "(revision %ld.%ld) with %d interrupts\n",
                         bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
 
@@ -147,9 +147,9 @@ void __init omap_init_irq(void)
                struct omap_irq_bank *bank = irq_banks + i;
 
                if (cpu_is_omap24xx())
-                       bank->base_reg = io_p2v(OMAP24XX_IC_BASE);
+                       bank->base_reg = OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE);
                else if (cpu_is_omap34xx())
-                       bank->base_reg = io_p2v(OMAP34XX_IC_BASE);
+                       bank->base_reg = OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE);
 
                omap_irq_bank_init_one(bank);
 

diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index bd6f8c965fbe0f4d4b5af5b9e50f1883a9ef2fe8..dbbef9015a0cc7dade6203beb05024bd674f952b 100644 (file)
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -28,24 +28,24 @@ static struct clk *uart_fck[OMAP_MAX_NR_PORTS];
 
 static struct plat_serial8250_port serial_platform_data[] = {
        {
-               .membase        = (void __iomem *)IO_ADDRESS(OMAP_UART1_BASE),
-               .mapbase        = (unsigned long)OMAP_UART1_BASE,
+               .membase        = IO_ADDRESS(OMAP_UART1_BASE),
+               .mapbase        = OMAP_UART1_BASE,
                .irq            = 72,
                .flags          = UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = OMAP24XX_BASE_BAUD * 16,
        }, {
-               .membase        = (void __iomem *)IO_ADDRESS(OMAP_UART2_BASE),
-               .mapbase        = (unsigned long)OMAP_UART2_BASE,
+               .membase        = IO_ADDRESS(OMAP_UART2_BASE),
+               .mapbase        = OMAP_UART2_BASE,
                .irq            = 73,
                .flags          = UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,
                .regshift       = 2,
                .uartclk        = OMAP24XX_BASE_BAUD * 16,
        }, {
-               .membase        = (void __iomem *)IO_ADDRESS(OMAP_UART3_BASE),
-               .mapbase        = (unsigned long)OMAP_UART3_BASE,
+               .membase        = IO_ADDRESS(OMAP_UART3_BASE),
+               .mapbase        = OMAP_UART3_BASE,
                .irq            = 74,
                .flags          = UPF_BOOT_AUTOCONF,
                .iotype         = UPIO_MEM,

diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 2914af01f197c1d1b5e104b5263c00adcd709755..7913248824adea312e176e2d7b0b380a34303a4c 100644 (file)
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -281,12 +281,12 @@ static void __init __omap2_set_globals(void)
 
 static struct omap_globals omap242x_globals = {
        .class  = OMAP242X_CLASS,
-       .tap    = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000),
-       .sdrc   = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
-       .sms    = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
-       .ctrl   = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
-       .prm    = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
-       .cm     = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
+       .tap    = OMAP2_IO_ADDRESS(0x48014000),
+       .sdrc   = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
+       .sms    = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
+       .ctrl   = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
+       .prm    = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
+       .cm     = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
 };
 
 void __init omap2_set_globals_242x(void)
@@ -300,12 +300,12 @@ void __init omap2_set_globals_242x(void)
 
 static struct omap_globals omap243x_globals = {
        .class  = OMAP243X_CLASS,
-       .tap    = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000),
-       .sdrc   = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
-       .sms    = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
-       .ctrl   = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
-       .prm    = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
-       .cm     = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
+       .tap    = OMAP2_IO_ADDRESS(0x4900a000),
+       .sdrc   = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
+       .sms    = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
+       .ctrl   = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
+       .prm    = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
+       .cm     = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
 };
 
 void __init omap2_set_globals_243x(void)
@@ -319,12 +319,12 @@ void __init omap2_set_globals_243x(void)
 
 static struct omap_globals omap343x_globals = {
        .class  = OMAP343X_CLASS,
-       .tap    = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000),
-       .sdrc   = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
-       .sms    = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
-       .ctrl   = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
-       .prm    = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
-       .cm     = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
+       .tap    = OMAP2_IO_ADDRESS(0x4830A000),
+       .sdrc   = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
+       .sms    = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
+       .ctrl   = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
+       .prm    = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
+       .cm     = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
 };
 
 void __init omap2_set_globals_343x(void)

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 1c6b9052d69103830a15542e42d878fa2e5674ad..bb3f187b6583ea1253e11726ef591e2768e3d8d5 100644 (file)
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2298,13 +2298,13 @@ static int __init omap_init_dma(void)
        int ch, r;
 
        if (cpu_class_is_omap1()) {
-               omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE);
+               omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
                dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
        } else if (cpu_is_omap24xx()) {
-               omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE);
+               omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
                dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
        } else if (cpu_is_omap34xx()) {
-               omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE);
+               omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
                dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
        } else {
                pr_err("DMA init failed for unsupported omap\n");

diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 8b4b55320f7f074cba23c846f10da180924376f3..167ec2fba4a9c83408c0c36ba80da8e700f79b25 100644 (file)
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void)
 
        for (i = 0; i < dm_timer_count; i++) {
                timer = &dm_timers[i];
-               timer->io_base = (void __iomem *)io_p2v(timer->phys_base);
+               timer->io_base = IO_ADDRESS(timer->phys_base);
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
                if (cpu_class_is_omap2()) {
                        char clk_name[16];

diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 1cd98fd9801a0804b33dead11ee943b34ef4f3b2..9ca0e08a2470123248694d83ac11d3bc86b78165 100644 (file)
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -20,11 +20,11 @@
 
 #ifndef __ASSEMBLY__
 #define OMAP242X_CTRL_REGADDR(reg)                                     \
-       (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+       IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
 #define OMAP243X_CTRL_REGADDR(reg)                                     \
-       (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+       IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
 #define OMAP343X_CTRL_REGADDR(reg)                                     \
-       (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+       IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #else
 #define OMAP242X_CTRL_REGADDR(reg)     IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
 #define OMAP243X_CTRL_REGADDR(reg)     IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))

diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 265833763c5b26a81e6079d314934e1418d576bc..e6a1f28fa2ddbddf919811d73364835883713524 100644 (file)
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -55,14 +55,13 @@
 
 #if defined(CONFIG_ARCH_OMAP1)
 
-#define IO_PHYS                0xFFFB0000
-#define IO_OFFSET      0x01000000      /* Virtual IO = 0xfefb0000 */
-#define IO_SIZE                0x40000
-#define IO_VIRT                (IO_PHYS - IO_OFFSET)
-#define IO_ADDRESS(pa) ((pa) - IO_OFFSET)
-#define OMAP1_IO_ADDRESS(pa)   ((pa) - IO_OFFSET)
-#define io_p2v(pa)     ((pa) - IO_OFFSET)
-#define io_v2p(va)     ((va) + IO_OFFSET)
+#define IO_PHYS                        0xFFFB0000
+#define IO_OFFSET              0x01000000      /* Virtual IO = 0xfefb0000 */
+#define IO_SIZE                        0x40000
+#define IO_VIRT                        (IO_PHYS - IO_OFFSET)
+#define __IO_ADDRESS(pa)       ((pa) - IO_OFFSET)
+#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
+#define io_v2p(va)             ((va) + IO_OFFSET)
 
 #elif defined(CONFIG_ARCH_OMAP2)
 
@@ -87,11 +86,10 @@
 #define OMAP243X_SMS_VIRT      0xFC000000
 #define OMAP243X_SMS_SIZE      SZ_1M
 
-#define IO_OFFSET      0x90000000
-#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define OMAP2_IO_ADDRESS(pa)   ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define io_p2v(pa)     ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define io_v2p(va)     ((va) - IO_OFFSET)      /* Works for L3 and L4 */
+#define IO_OFFSET              0x90000000
+#define __IO_ADDRESS(pa)       ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
+#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
+#define io_v2p(va)             ((va) - IO_OFFSET)      /* Works for L3 and L4 */
 
 /* DSP */
 #define DSP_MEM_24XX_PHYS      OMAP2420_DSP_MEM_BASE   /* 0x58000000 */
@@ -146,9 +144,8 @@
 
 
 #define IO_OFFSET              0x90000000
-#define IO_ADDRESS(pa)         ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define OMAP2_IO_ADDRESS(pa)   ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define io_p2v(pa)             ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define __IO_ADDRESS(pa)       ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
 #define io_v2p(va)             ((va) - IO_OFFSET)/* Works for L3 and L4 */
 
 /* DSP */
@@ -164,7 +161,17 @@
 
 #endif
 
-#ifndef __ASSEMBLER__
+#ifdef __ASSEMBLER__
+
+#define IO_ADDRESS(pa)         __IO_ADDRESS(pa)
+#define OMAP1_IO_ADDRESS(pa)   __OMAP1_IO_ADDRESS(pa)
+#define OMAP2_IO_ADDRESS(pa)   __OMAP2_IO_ADDRESS(pa)
+
+#else
+
+#define IO_ADDRESS(pa)         ((void __iomem *)__IO_ADDRESS(pa))
+#define OMAP1_IO_ADDRESS(pa)   ((void __iomem *)__OMAP1_IO_ADDRESS(pa))
+#define OMAP2_IO_ADDRESS(pa)   ((void __iomem *)__OMAP2_IO_ADDRESS(pa))
 
 /*
  * Functions to access the OMAP IO region
@@ -175,13 +182,13 @@
  *      - DO NOT use hardcoded virtual addresses to allow changing the
  *        IO address space again if needed
  */
-#define omap_readb(a)          (*(volatile unsigned char  *)IO_ADDRESS(a))
-#define omap_readw(a)          (*(volatile unsigned short *)IO_ADDRESS(a))
-#define omap_readl(a)          (*(volatile unsigned int   *)IO_ADDRESS(a))
+#define omap_readb(a)          __raw_readb(IO_ADDRESS(a))
+#define omap_readw(a)          __raw_readw(IO_ADDRESS(a))
+#define omap_readl(a)          __raw_readl(IO_ADDRESS(a))
 
-#define omap_writeb(v,a)       (*(volatile unsigned char  *)IO_ADDRESS(a) = (v))
-#define omap_writew(v,a)       (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
-#define omap_writel(v,a)       (*(volatile unsigned int   *)IO_ADDRESS(a) = (v))
+#define omap_writeb(v,a)       __raw_writeb(v, IO_ADDRESS(a))
+#define omap_writew(v,a)       __raw_writew(v, IO_ADDRESS(a))
+#define omap_writel(v,a)       __raw_writel(v, IO_ADDRESS(a))
 
 struct omap_sdrc_params;
 

diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index 5a1f3db6e698e58e8edd27c9ce8af9aea34a8002..e4cf1c5b370a10df8022ee3e95aabb2f20ba0494 100644 (file)
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -39,11 +39,11 @@
  * Register and offset definitions to be used in PM assembler code
  * ----------------------------------------------------------------------------
  */
-#define CLKGEN_REG_ASM_BASE            io_p2v(0xfffece00)
+#define CLKGEN_REG_ASM_BASE            IO_ADDRESS(0xfffece00)
 #define ARM_IDLECT1_ASM_OFFSET         0x04
 #define ARM_IDLECT2_ASM_OFFSET         0x08
 
-#define TCMIF_ASM_BASE                 io_p2v(0xfffecc00)
+#define TCMIF_ASM_BASE                 IO_ADDRESS(0xfffecc00)
 #define EMIFS_CONFIG_ASM_OFFSET                0x0c
 #define EMIFF_SDRAM_CONFIG_ASM_OFFSET  0x20
 

diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index b7db862806a806df3aa510e04cd643af758f7c41..c66c838879037aa3a5b8b3f49796340373f4ac99 100644 (file)
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -75,12 +75,9 @@
  * SMS register access
  */
 
-#define OMAP242X_SMS_REGADDR(reg)                                      \
-                       (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
-#define OMAP243X_SMS_REGADDR(reg)                                      \
-                       (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
-#define OMAP343X_SMS_REGADDR(reg)                                      \
-                       (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+#define OMAP242X_SMS_REGADDR(reg)      IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+#define OMAP243X_SMS_REGADDR(reg)      IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+#define OMAP343X_SMS_REGADDR(reg)      IO_ADDRESS(OMAP343X_SMS_BASE + reg)
 
 /* SMS register offsets - read/write with sms_{read,write}_reg() */
 

diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index df2180591dcfa1a06ce009c03e0677c169aa7c3a..82ba030a915711273b03492acb96676ca1f54925 100644 (file)
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable)
        dispc_write_reg(DISPC_CONTROL, l);
 
        /* Set bypass mode in RFBI module */
-       l = __raw_readl(io_p2v(RFBI_CONTROL));
+       l = __raw_readl(IO_ADDRESS(RFBI_CONTROL));
        l |= enable ? 0 : (1 << 1);
-       __raw_writel(l, io_p2v(RFBI_CONTROL));
+       __raw_writel(l, IO_ADDRESS(RFBI_CONTROL));
 }
 
 static void set_lcd_data_lines(int data_lines)
@@ -1422,7 +1422,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
        }
 
        /* L3 firewall setting: enable access to OCM RAM */
-       __raw_writel(0x402000b0, io_p2v(0x680050a0));
+       __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0));
 
        if ((r = alloc_palette_ram()) < 0)
                goto fail2;