]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code
authorGerhard Pircher <gerhard_pircher@gmx.net>
Fri, 23 Jan 2009 06:51:28 +0000 (06:51 +0000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 28 Jan 2009 06:15:52 +0000 (17:15 +1100)
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL.
Thus it has to be masked out, if the BAT mapping should be non
cacheable or CPU_FTR_NEED_COHERENT is not set.

This will work on normal SMP setups because we force-set
CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP.

Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
arch/powerpc/mm/ppc_mmu_32.c

index 45d925360b89aa3a2b17f71daa2a823f6b11c7ef..fe65c405412c55018f9d71e0f6a437e292a1dcf5 100644 (file)
@@ -123,9 +123,9 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
        int wimgxpp;
        struct ppc_bat *bat = BATS[index];
 
-       if (((flags & _PAGE_NO_CACHE) == 0) &&
-           cpu_has_feature(CPU_FTR_NEED_COHERENT))
-               flags |= _PAGE_COHERENT;
+       if ((flags & _PAGE_NO_CACHE) ||
+           (cpu_has_feature(CPU_FTR_NEED_COHERENT) == 0))
+               flags &= ~_PAGE_COHERENT;
 
        bl = (size >> 17) - 1;
        if (PVR_VER(mfspr(SPRN_PVR)) != 1) {