regs += 0x20;
 
                printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs);
-               iic->regs = __ioremap(regs, sizeof(struct iic_regs),
-                                     _PAGE_NO_CACHE);
-
+               iic->regs = ioremap(regs, sizeof(struct iic_regs));
                iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe);
        }
 
                }
 
                iic = &per_cpu(iic, np[0]);
-               iic->regs = __ioremap(regs[0], sizeof(struct iic_regs),
-                                     _PAGE_NO_CACHE);
+               iic->regs = ioremap(regs[0], sizeof(struct iic_regs));
                iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe);
                printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs);
 
                iic = &per_cpu(iic, np[1]);
-               iic->regs = __ioremap(regs[2], sizeof(struct iic_regs),
-                                     _PAGE_NO_CACHE);
+               iic->regs = ioremap(regs[2], sizeof(struct iic_regs));
                iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe);
                printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs);
 
 
 
        /* node 0 */
        iommu = &cell_iommus[0];
-       iommu->mapped_base = __ioremap(0x20000511000, 0x1000, _PAGE_NO_CACHE);
-       iommu->mapped_mmio_base = __ioremap(0x20000510000, 0x1000, _PAGE_NO_CACHE);
+       iommu->mapped_base = ioremap(0x20000511000, 0x1000);
+       iommu->mapped_mmio_base = ioremap(0x20000510000, 0x1000);
 
        enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base);
 
 
        /* node 1 */
        iommu = &cell_iommus[1];
-       iommu->mapped_base = __ioremap(0x30000511000, 0x1000, _PAGE_NO_CACHE);
-       iommu->mapped_mmio_base = __ioremap(0x30000510000, 0x1000, _PAGE_NO_CACHE);
+       iommu->mapped_base = ioremap(0x30000511000, 0x1000);
+       iommu->mapped_mmio_base = ioremap(0x30000510000, 0x1000);
 
        enable_mapping(iommu->mapped_base, iommu->mapped_mmio_base);
 
                iommu->base = *base;
                iommu->mmio_base = *mmio_base;
 
-               iommu->mapped_base = __ioremap(*base, 0x1000, _PAGE_NO_CACHE);
-               iommu->mapped_mmio_base = __ioremap(*mmio_base, 0x1000, _PAGE_NO_CACHE);
+               iommu->mapped_base = ioremap(*base, 0x1000);
+               iommu->mapped_mmio_base = ioremap(*mmio_base, 0x1000);
 
                enable_mapping(iommu->mapped_base,
                               iommu->mapped_mmio_base);
 
 
        pr_debug("pervasive area for CPU %d at %lx, size %x\n",
                        cpu, real_address, size);
-       p->regs = __ioremap(real_address, size, _PAGE_NO_CACHE);
+       p->regs = ioremap(real_address, size);
        p->thread = thread;
        return 0;
 }
 
        for (node = 0; node < num_present_cpus()/2; node++) {
                spiderpic = pics[node];
                printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic);
-               spider_pics[node] = __ioremap(spiderpic, 0x800, _PAGE_NO_CACHE);
+               spider_pics[node] = ioremap(spiderpic, 0x800);
                for (n = 0; n < IIC_NUM_EXT; n++) {
                        int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
                        get_irq_desc(irq)->handler = &spider_pic;
                if ( n != 2)
                        printk("reg property with invalid number of elements \n");
 
-               spider_pics[node] = __ioremap(spider_reg, 0x800, _PAGE_NO_CACHE);
+               spider_pics[node] = ioremap(spider_reg, 0x800);
 
                printk("SPIDER addr: %lx with %i addr_cells mapped to %p\n",
                       spider_reg, n, spider_pics[node]);