In the clock init code, the DPLL value set by the bootloader is
queried, but always turns zero due it's parent clock (sys_ck) having
no default rate. This results in the improper setting of the default
PRCM rate-table entry and any queries of virt_prcm_set rate to return 0.
Following the example of the TI kernel, set the default sys_ck rate to
13MHz. Could then be overridden in board setup code.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
/* With out modem likely 12MHz, with modem likely 13MHz */
static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */
.name = "sys_ck", /* ~ ref_clk also */
+ .rate = 13000000,
.parent = &osc_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
ALWAYS_ENABLED | RATE_PROPAGATES,