[PATCH] spufs: clear dsisr on CLASS1[Mf] exception

Because of always clearing DSISR at spu class 1 interrupt handler,
kernel may lose Class1[Mf] interrupt.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Geoff Levand <geoff.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index f9da79eb3db03608492da050104f426d166b8cbe..3a5302151e095137a22dd72ec6a3b0248756d377 100644 (file)
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -240,7 +240,8 @@ spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
        stat  = in_be64(&spu->priv1->int_stat_class1_RW) & mask;
        dar   = in_be64(&spu->priv1->mfc_dar_RW);
        dsisr = in_be64(&spu->priv1->mfc_dsisr_RW);
-       out_be64(&spu->priv1->mfc_dsisr_RW, 0UL);
+       if (stat & 2) /* mapping fault */
+               out_be64(&spu->priv1->mfc_dsisr_RW, 0UL);
        out_be64(&spu->priv1->int_stat_class1_RW, stat);
        spin_unlock(&spu->register_lock);