[ARM] 4595/1: ns9xxx: define registers as void __iomem * instead of volatile u32

As a consequence registers are now accessed with __raw_{read,write}[bl].

Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 7fa3fb1f08ef639fd4dcd84fdd96e249b34d2c74..0f65177f9e5fafabcd897ee610915d1e4409d49a 100644 (file)
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -45,7 +45,13 @@ static void a9m9750dev_fpga_ack_irq(unsigned int irq)
 
 static void a9m9750dev_fpga_mask_irq(unsigned int irq)
 {
-       FPGA_IER &= ~(1 << (irq - FPGA_IRQ(0)));
+       u8 ier;
+
+       ier = __raw_readb(FPGA_IER);
+
+       ier &= ~(1 << (irq - FPGA_IRQ(0)));
+
+       __raw_writeb(ier, FPGA_IER);
 }
 
 static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
@@ -56,7 +62,13 @@ static void a9m9750dev_fpga_maskack_irq(unsigned int irq)
 
 static void a9m9750dev_fpga_unmask_irq(unsigned int irq)
 {
-       FPGA_IER |= 1 << (irq - FPGA_IRQ(0));
+       u8 ier;
+
+       ier = __raw_readb(FPGA_IER);
+
+       ier |= 1 << (irq - FPGA_IRQ(0));
+
+       __raw_writeb(ier, FPGA_IER);
 }
 
 static struct irq_chip a9m9750dev_fpga_chip = {
@@ -69,7 +81,7 @@ static struct irq_chip a9m9750dev_fpga_chip = {
 static void a9m9750dev_fpga_demux_handler(unsigned int irq,
                struct irq_desc *desc)
 {
-       int stat = FPGA_ISR;
+       u8 stat = __raw_readb(FPGA_ISR);
 
        desc->chip->mask_ack(irq);
 
@@ -89,7 +101,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
 
 void __init board_a9m9750dev_init_irq(void)
 {
-       u32 reg;
+       u32 eic;
        int i;
 
        if (gpio_request(11, "board a9m9750dev extirq2") == 0)
@@ -105,10 +117,10 @@ void __init board_a9m9750dev_init_irq(void)
        }
 
        /* IRQ_EXT2: level sensitive + active low */
-       reg = SYS_EIC(2);
-       REGSET(reg, SYS_EIC, PLTY, AL);
-       REGSET(reg, SYS_EIC, LVEDG, LEVEL);
-       SYS_EIC(2) = reg;
+       eic = __raw_readl(SYS_EIC(2));
+       REGSET(eic, SYS_EIC, PLTY, AL);
+       REGSET(eic, SYS_EIC, LVEDG, LEVEL);
+       __raw_writel(eic, SYS_EIC(2));
 
        set_irq_chained_handler(IRQ_EXT2,
                        a9m9750dev_fpga_demux_handler);
@@ -172,17 +184,18 @@ void __init board_a9m9750dev_init_machine(void)
        u32 reg;
 
        /* setup static CS0: memory base ... */
-       REGSETIM(SYS_SMCSSMB(0), SYS_SMCSSMB, CSxB,
-                       NS9XXX_CSxSTAT_PHYS(0) >> 12);
+       reg = __raw_readl(SYS_SMCSSMB(0));
+       REGSETIM(reg, SYS_SMCSSMB, CSxB, NS9XXX_CSxSTAT_PHYS(0) >> 12);
+       __raw_writel(reg, SYS_SMCSSMB(0));
 
        /* ... and mask */
-       reg = SYS_SMCSSMM(0);
+       reg = __raw_readl(SYS_SMCSSMM(0));
        REGSETIM(reg, SYS_SMCSSMM, CSxM, 0xfffff);
        REGSET(reg, SYS_SMCSSMM, CSEx, EN);
-       SYS_SMCSSMM(0) = reg;
+       __raw_writel(reg, SYS_SMCSSMM(0));
 
        /* setup static CS0: memory configuration */
-       reg = MEM_SMC(0);
+       reg = __raw_readl(MEM_SMC(0));
        REGSET(reg, MEM_SMC, PSMC, OFF);
        REGSET(reg, MEM_SMC, BSMC, OFF);
        REGSET(reg, MEM_SMC, EW, OFF);
@@ -190,13 +203,13 @@ void __init board_a9m9750dev_init_machine(void)
        REGSET(reg, MEM_SMC, PC, AL);
        REGSET(reg, MEM_SMC, PM, DIS);
        REGSET(reg, MEM_SMC, MW, 8);
-       MEM_SMC(0) = reg;
+       __raw_writel(reg, MEM_SMC(0));
 
        /* setup static CS0: timing */
-       MEM_SMWED(0) = 0x2;
-       MEM_SMOED(0) = 0x2;
-       MEM_SMRD(0) = 0x6;
-       MEM_SMWD(0) = 0x6;
+       __raw_writel(0x2, MEM_SMWED(0));
+       __raw_writel(0x2, MEM_SMOED(0));
+       __raw_writel(0x6, MEM_SMRD(0));
+       __raw_writel(0x6, MEM_SMWD(0));
 
        platform_add_devices(board_a9m9750dev_devices,
                        ARRAY_SIZE(board_a9m9750dev_devices));

diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
index 87b872fdca7e9d519bb594dd73ebc3acd8ac0d5a..b2230213b983deacd3db7e0a251fc1d27b9f2e69 100644 (file)
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ b/arch/arm/mach-ns9xxx/gpio.c
@@ -16,6 +16,7 @@
 #include <asm/arch-ns9xxx/gpio.h>
 #include <asm/arch-ns9xxx/processor.h>
 #include <asm/arch-ns9xxx/regs-bbu.h>
+#include <asm/io.h>
 #include <asm/bug.h>
 #include <asm/types.h>
 #include <asm/bitops.h>
@@ -47,38 +48,38 @@ static inline int ns9xxx_valid_gpio(unsigned gpio)
                BUG();
 }
 
-static inline volatile u32 *ns9xxx_gpio_get_gconfaddr(unsigned gpio)
+static inline void __iomem *ns9xxx_gpio_get_gconfaddr(unsigned gpio)
 {
        if (gpio < 56)
-               return &BBU_GCONFb1(gpio / 8);
+               return BBU_GCONFb1(gpio / 8);
        else
                /*
                 * this could be optimised away on
                 * ns9750 only builds, but it isn't ...
                 */
-               return &BBU_GCONFb2((gpio - 56) / 8);
+               return BBU_GCONFb2((gpio - 56) / 8);
 }
 
-static inline volatile u32 *ns9xxx_gpio_get_gctrladdr(unsigned gpio)
+static inline void __iomem *ns9xxx_gpio_get_gctrladdr(unsigned gpio)
 {
        if (gpio < 32)
-               return &BBU_GCTRL1;
+               return BBU_GCTRL1;
        else if (gpio < 64)
-               return &BBU_GCTRL2;
+               return BBU_GCTRL2;
        else
                /* this could be optimised away on ns9750 only builds */
-               return &BBU_GCTRL3;
+               return BBU_GCTRL3;
 }
 
-static inline volatile u32 *ns9xxx_gpio_get_gstataddr(unsigned gpio)
+static inline void __iomem *ns9xxx_gpio_get_gstataddr(unsigned gpio)
 {
        if (gpio < 32)
-               return &BBU_GSTAT1;
+               return BBU_GSTAT1;
        else if (gpio < 64)
-               return &BBU_GSTAT2;
+               return BBU_GSTAT2;
        else
                /* this could be optimised away on ns9750 only builds */
-               return &BBU_GSTAT3;
+               return BBU_GSTAT3;
 }
 
 int gpio_request(unsigned gpio, const char *label)
@@ -105,17 +106,17 @@ EXPORT_SYMBOL(gpio_free);
  */
 static int __ns9xxx_gpio_configure(unsigned gpio, int dir, int inv, int func)
 {
-       volatile u32 *conf = ns9xxx_gpio_get_gconfaddr(gpio);
+       void __iomem *conf = ns9xxx_gpio_get_gconfaddr(gpio);
        u32 confval;
        unsigned long flags;
 
        spin_lock_irqsave(&gpio_lock, flags);
 
-       confval = *conf;
+       confval = __raw_readl(conf);
        REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
        REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
        REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
-       *conf = confval;
+       __raw_writel(confval, conf);
 
        spin_unlock_irqrestore(&gpio_lock, flags);
 
@@ -158,10 +159,10 @@ EXPORT_SYMBOL(gpio_direction_output);
 
 int gpio_get_value(unsigned gpio)
 {
-       volatile u32 *stat = ns9xxx_gpio_get_gstataddr(gpio);
+       void __iomem *stat = ns9xxx_gpio_get_gstataddr(gpio);
        int ret;
 
-       ret = 1 & (*stat >> (gpio & 31));
+       ret = 1 & (__raw_readl(stat) >> (gpio & 31));
 
        return ret;
 }
@@ -169,15 +170,20 @@ EXPORT_SYMBOL(gpio_get_value);
 
 void gpio_set_value(unsigned gpio, int value)
 {
-       volatile u32 *ctrl = ns9xxx_gpio_get_gctrladdr(gpio);
+       void __iomem *ctrl = ns9xxx_gpio_get_gctrladdr(gpio);
+       u32 ctrlval;
        unsigned long flags;
 
        spin_lock_irqsave(&gpio_lock, flags);
 
+       ctrlval = __raw_readl(ctrl);
+
        if (value)
-               *ctrl |= 1 << (gpio & 31);
+               ctrlval |= 1 << (gpio & 31);
        else
-               *ctrl &= ~(1 << (gpio & 31));
+               ctrlval &= ~(1 << (gpio & 31));
+
+       __raw_writel(ctrlval, ctrl);
 
        spin_unlock_irqrestore(&gpio_lock, flags);
 }

diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 24d424e10e4c7dbf27b37cac9095f3d21ad60012..00001b874e97e317ad5f0e5ee90998d930fb0144 100644 (file)
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -9,6 +9,7 @@
  * the Free Software Foundation.
  */
 #include <linux/interrupt.h>
+#include <asm/io.h>
 #include <asm/mach/irq.h>
 #include <asm/mach-types.h>
 #include <asm/arch-ns9xxx/regs-sys.h>
@@ -20,12 +21,14 @@
 static void ns9xxx_mask_irq(unsigned int irq)
 {
        /* XXX: better use cpp symbols */
-       SYS_IC(irq / 4) &= ~(1 << (7 + 8 * (3 - (irq & 3))));
+       u32 ic = __raw_readl(SYS_IC(irq / 4));
+       ic &= ~(1 << (7 + 8 * (3 - (irq & 3))));
+       __raw_writel(ic, SYS_IC(irq / 4));
 }
 
 static void ns9xxx_ack_irq(unsigned int irq)
 {
-       SYS_ISRADDR = 0;
+       __raw_writel(0, SYS_ISRADDR);
 }
 
 static void ns9xxx_maskack_irq(unsigned int irq)
@@ -37,7 +40,9 @@ static void ns9xxx_maskack_irq(unsigned int irq)
 static void ns9xxx_unmask_irq(unsigned int irq)
 {
        /* XXX: better use cpp symbols */
-       SYS_IC(irq / 4) |= 1 << (7 + 8 * (3 - (irq & 3)));
+       u32 ic = __raw_readl(SYS_IC(irq / 4));
+       ic |= 1 << (7 + 8 * (3 - (irq & 3)));
+       __raw_writel(ic, SYS_IC(irq / 4));
 }
 
 static struct irq_chip ns9xxx_chip = {
@@ -53,14 +58,14 @@ void __init ns9xxx_init_irq(void)
 
        /* disable all IRQs */
        for (i = 0; i < 8; ++i)
-               SYS_IC(i) = (4 * i) << 24 | (4 * i + 1) << 16 |
-                       (4 * i + 2) << 8 | (4 * i + 3);
+               __raw_writel((4 * i) << 24 | (4 * i + 1) << 16 |
+                               (4 * i + 2) << 8 | (4 * i + 3), SYS_IC(i));
 
        /* simple interrupt prio table:
         * prio(x) < prio(y) <=> x < y
         */
        for (i = 0; i < 32; ++i)
-               SYS_IVA(i) = i;
+               __raw_writel(i, SYS_IVA(i));
 
        for (i = IRQ_WATCHDOG; i <= IRQ_EXT3; ++i) {
                set_irq_chip(i, &ns9xxx_chip);

diff --git a/arch/arm/mach-ns9xxx/time.c b/arch/arm/mach-ns9xxx/time.c
index 6f295158b168cc85178b80abd39f638e46912994..c3dd1f4acb9919e20141c2f187c3ec7ee7f51be2 100644 (file)
--- a/arch/arm/mach-ns9xxx/time.c
+++ b/arch/arm/mach-ns9xxx/time.c
@@ -27,7 +27,7 @@ static u32 latch;
 
 static cycle_t ns9xxx_clocksource_read(void)
 {
-       return SYS_TR(TIMER_CLOCKSOURCE);
+       return __raw_readl(SYS_TR(TIMER_CLOCKSOURCE));
 }
 
 static struct clocksource ns9xxx_clocksource = {
@@ -42,11 +42,11 @@ static struct clocksource ns9xxx_clocksource = {
 static void ns9xxx_clockevent_setmode(enum clock_event_mode mode,
                struct clock_event_device *clk)
 {
-       u32 tc = SYS_TC(TIMER_CLOCKEVENT);
+       u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
 
        switch(mode) {
        case CLOCK_EVT_MODE_PERIODIC:
-               SYS_TRC(TIMER_CLOCKEVENT) = latch;
+               __raw_writel(latch, SYS_TRC(TIMER_CLOCKEVENT));
                REGSET(tc, SYS_TCx, REN, EN);
                REGSET(tc, SYS_TCx, INTS, EN);
                REGSET(tc, SYS_TCx, TEN, EN);
@@ -66,24 +66,24 @@ static void ns9xxx_clockevent_setmode(enum clock_event_mode mode,
                break;
        }
 
-       SYS_TC(TIMER_CLOCKEVENT) = tc;
+       __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
 }
 
 static int ns9xxx_clockevent_setnextevent(unsigned long evt,
                struct clock_event_device *clk)
 {
-       u32 tc = SYS_TC(TIMER_CLOCKEVENT);
+       u32 tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
 
        if (REGGET(tc, SYS_TCx, TEN)) {
                REGSET(tc, SYS_TCx, TEN, DIS);
-               SYS_TC(TIMER_CLOCKEVENT) = tc;
+               __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
        }
 
        REGSET(tc, SYS_TCx, TEN, EN);
 
-       SYS_TRC(TIMER_CLOCKEVENT) = evt;
+       __raw_writel(evt, SYS_TRC(TIMER_CLOCKEVENT));
 
-       SYS_TC(TIMER_CLOCKEVENT) = tc;
+       __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
 
        return 0;
 }
@@ -104,15 +104,15 @@ static irqreturn_t ns9xxx_clockevent_handler(int irq, void *dev_id)
        struct clock_event_device *evt = &ns9xxx_clockevent_device;
 
        /* clear irq */
-       tc = SYS_TC(timerno);
+       tc = __raw_readl(SYS_TC(timerno));
        if (REGGET(tc, SYS_TCx, REN) == SYS_TCx_REN_DIS) {
                REGSET(tc, SYS_TCx, TEN, DIS);
-               SYS_TC(timerno) = tc;
+               __raw_writel(tc, SYS_TC(timerno));
        }
        REGSET(tc, SYS_TCx, INTC, SET);
-       SYS_TC(timerno) = tc;
+       __raw_writel(tc, SYS_TC(timerno));
        REGSET(tc, SYS_TCx, INTC, UNSET);
-       SYS_TC(timerno) = tc;
+       __raw_writel(tc, SYS_TC(timerno));
 
        evt->event_handler(evt);
 
@@ -129,13 +129,13 @@ static void __init ns9xxx_timer_init(void)
 {
        int tc;
 
-       tc = SYS_TC(TIMER_CLOCKSOURCE);
+       tc = __raw_readl(SYS_TC(TIMER_CLOCKSOURCE));
        if (REGGET(tc, SYS_TCx, TEN)) {
                REGSET(tc, SYS_TCx, TEN, DIS);
-               SYS_TC(TIMER_CLOCKSOURCE) = tc;
+               __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
        }
 
-       SYS_TRC(TIMER_CLOCKSOURCE) = 0;
+       __raw_writel(0, SYS_TRC(TIMER_CLOCKSOURCE));
 
        REGSET(tc, SYS_TCx, TEN, EN);
        REGSET(tc, SYS_TCx, TDBG, STOP);
@@ -146,7 +146,7 @@ static void __init ns9xxx_timer_init(void)
        REGSET(tc, SYS_TCx, TSZ, 32);
        REGSET(tc, SYS_TCx, REN, EN);
 
-       SYS_TC(TIMER_CLOCKSOURCE) = tc;
+       __raw_writel(tc, SYS_TC(TIMER_CLOCKSOURCE));
 
        ns9xxx_clocksource.mult = clocksource_hz2mult(ns9xxx_cpuclock(),
                        ns9xxx_clocksource.shift);
@@ -155,7 +155,7 @@ static void __init ns9xxx_timer_init(void)
 
        latch = SH_DIV(ns9xxx_cpuclock(), HZ, 0);
 
-       tc = SYS_TC(TIMER_CLOCKEVENT);
+       tc = __raw_readl(SYS_TC(TIMER_CLOCKEVENT));
        REGSET(tc, SYS_TCx, TEN, DIS);
        REGSET(tc, SYS_TCx, TDBG, STOP);
        REGSET(tc, SYS_TCx, TLCS, CPU);
@@ -164,7 +164,7 @@ static void __init ns9xxx_timer_init(void)
        REGSET(tc, SYS_TCx, UDS, DOWN);
        REGSET(tc, SYS_TCx, TSZ, 32);
        REGSET(tc, SYS_TCx, REN, EN);
-       SYS_TC(TIMER_CLOCKEVENT) = tc;
+       __raw_writel(tc, SYS_TC(TIMER_CLOCKEVENT));
 
        ns9xxx_clockevent_device.mult = div_sc(ns9xxx_cpuclock(),
                        NSEC_PER_SEC, ns9xxx_clockevent_device.shift);

diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
index 90604d48d5615f971c1f01a8ad1fc08e2bc2dc25..b943d3a92a1d9437c50c056d419b617dba389171 100644 (file)
--- a/include/asm-arm/arch-ns9xxx/clock.h
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -19,7 +19,7 @@
 static inline u32 ns9xxx_systemclock(void) __attribute__((const));
 static inline u32 ns9xxx_systemclock(void)
 {
-       u32 pll = SYS_PLL;
+       u32 pll = __raw_readl(SYS_PLL);
 
        /*
         * The system clock should be a multiple of HZ * TIMERCLOCKSELECT (in

diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h
index b5d66f963981462a39897dadcce5ece38a716924..0b7b34603f1c9f9f97eea93ccd3fa409ff968fff 100644 (file)
--- a/include/asm-arm/arch-ns9xxx/hardware.h
+++ b/include/asm-arm/arch-ns9xxx/hardware.h
@@ -35,11 +35,8 @@
 
 #ifndef __ASSEMBLY__
 
-#  define __REG(x)     (*((volatile u32 *)io_p2v((x))))
-#  define __REG2(x, y) (*((volatile u32 *)io_p2v((x)) + (y)))
-
-#  define __REGB(x)    (*((volatile u8 *)io_p2v((x))))
-#  define __REGB2(x)   (*((volatile u8 *)io_p2v((x)) + (y)))
+#  define __REG(x)     ((void __iomem __force *)io_p2v((x)))
+#  define __REG2(x, y) ((void __iomem __force *)(io_p2v((x)) + 4 * (y)))
 
 #  define __REGSET(var, field, value)                                  \
        ((var) = (((var) & ~((field) & ~(value))) | (value)))
@@ -77,9 +74,6 @@
 #  define __REG(x)     io_p2v(x)
 #  define __REG2(x, y) io_p2v((x) + (y))
 
-#  define __REGB(x)    __REG((x))
-#  define __REGB2(x, y)        __REG2((x), (y))
-
 #endif
 
 #endif /* ifndef __ASM_ARCH_HARDWARE_H */

diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
index c3dc532dd20c1854ca96480e450e903ed7c1185f..afa3a9db3e1d626b95198e0a8f1a0479b8f06f8e 100644 (file)
--- a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
+++ b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
@@ -18,7 +18,7 @@
 #define FPGA_UARTC_BASE        io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
 #define FPGA_UARTD_BASE        io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
 
-#define FPGA_IER       __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
-#define FPGA_ISR       __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
+#define FPGA_IER       __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
+#define FPGA_ISR       __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
 
 #endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */

diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h
index e3cd4d31b3f3e7d50d811a07c1938bbf6a563801..c1082bd8977c73428dd0798b42c2eaf3c61371bd 100644 (file)
--- a/include/asm-arm/arch-ns9xxx/system.h
+++ b/include/asm-arm/arch-ns9xxx/system.h
@@ -24,9 +24,9 @@ static inline void arch_reset(char mode)
 {
        u32 reg;
 
-       reg = SYS_PLL >> 16;
+       reg = __raw_readl(SYS_PLL) >> 16;
        REGSET(reg, SYS_PLL, SWC, YES);
-       SYS_PLL = reg;
+       __raw_writel(reg, SYS_PLL);
 
        BUG();
 }