]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
x86, VisWS: turn into generic arch, add early init quirks
authorIngo Molnar <mingo@elte.hu>
Thu, 10 Jul 2008 11:31:04 +0000 (13:31 +0200)
committerIngo Molnar <mingo@elte.hu>
Thu, 10 Jul 2008 16:55:32 +0000 (18:55 +0200)
add early init quirks for VisWS. This gradually turns the VISWS subarch
into a generic PC architecture.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/Kconfig
arch/x86/mach-visws/Makefile
arch/x86/mach-visws/reboot.c [deleted file]
arch/x86/mach-visws/setup.c
arch/x86/mach-visws/setup_visws.c [new file with mode: 0644]
arch/x86/mach-visws/traps.c
arch/x86/mach-visws/visws_apic.c
arch/x86/pci/Makefile
arch/x86/pci/visws.c
drivers/pci/Makefile

index 3b1b1da78dae500585d38e7965fb36b9cd440a2f..5198a0857944539f8a127923b247b316b17cd53f 100644 (file)
@@ -186,7 +186,7 @@ config X86_HT
 
 config X86_BIOS_REBOOT
        bool
-       depends on !X86_VISWS && !X86_VOYAGER
+       depends on !X86_VOYAGER
        default y
 
 config X86_TRAMPOLINE
index 835fd96ad768f1b33f0be123d960f48767a61097..35a4c101b2678e6d0cc8cd7a4b8b5bae5fd75be8 100644 (file)
@@ -2,7 +2,7 @@
 # Makefile for the linux kernel.
 #
 
-obj-y                          := setup.o traps.o reboot.o
+obj-y                          := setup.o setup_visws.o traps.o
 
 obj-$(CONFIG_X86_VISWS_APIC)   += visws_apic.o
 obj-$(CONFIG_X86_LOCAL_APIC)   += mpparse.o
diff --git a/arch/x86/mach-visws/reboot.c b/arch/x86/mach-visws/reboot.c
deleted file mode 100644 (file)
index 79c26ea..0000000
+++ /dev/null
@@ -1,55 +0,0 @@
-#include <linux/module.h>
-#include <linux/smp.h>
-#include <linux/delay.h>
-
-#include <asm/io.h>
-#include "piix4.h"
-
-void (*pm_power_off)(void);
-EXPORT_SYMBOL(pm_power_off);
-
-void machine_shutdown(void)
-{
-#ifdef CONFIG_SMP
-       smp_send_stop();
-#endif
-}
-
-void machine_emergency_restart(void)
-{
-       /*
-        * Visual Workstations restart after this
-        * register is poked on the PIIX4
-        */
-       outb(PIIX4_RESET_VAL, PIIX4_RESET_PORT);
-}
-
-void machine_restart(char * __unused)
-{
-       machine_shutdown();
-       machine_emergency_restart();
-}
-
-void machine_power_off(void)
-{
-       unsigned short pm_status;
-/*     extern unsigned int pci_bus0; */
-
-       while ((pm_status = inw(PMSTS_PORT)) & 0x100)
-               outw(pm_status, PMSTS_PORT);
-
-       outw(PM_SUSPEND_ENABLE, PMCNTRL_PORT);
-
-       mdelay(10);
-
-#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
-       (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
-
-/*     outl(PCI_CONF1_ADDRESS(pci_bus0, SPECIAL_DEV, SPECIAL_REG), 0xCF8); */
-       outl(PIIX_SPECIAL_STOP, 0xCFC);
-}
-
-void machine_halt(void)
-{
-}
-
index 2f5e277686b8ef3e8325e119106ee292bed016be..b8054c3ffce376d2e2440af1dc132323efe239f2 100644 (file)
 #include <asm/e820.h>
 #include <asm/setup.h>
 
+/*
+ * Any quirks to be performed to initialize timers/irqs/etc?
+ */
+int (*arch_time_init_quirk)(void);
+int (*arch_pre_intr_init_quirk)(void);
+int (*arch_intr_init_quirk)(void);
+int (*arch_trap_init_quirk)(void);
+
 #ifdef CONFIG_HOTPLUG_CPU
 #define DEFAULT_SEND_IPI       (1)
 #else
@@ -29,6 +37,10 @@ int no_broadcast=DEFAULT_SEND_IPI;
  **/
 void __init pre_intr_init_hook(void)
 {
+       if (arch_pre_intr_init_quirk) {
+               if (arch_pre_intr_init_quirk())
+                       return;
+       }
        init_ISA_irqs();
 }
 
@@ -52,6 +64,10 @@ static struct irqaction irq2 = {
  **/
 void __init intr_init_hook(void)
 {
+       if (arch_intr_init_quirk) {
+               if (arch_intr_init_quirk())
+                       return;
+       }
 #ifdef CONFIG_X86_LOCAL_APIC
        apic_intr_init();
 #endif
@@ -81,6 +97,10 @@ void __init pre_setup_arch_hook(void)
  **/
 void __init trap_init_hook(void)
 {
+       if (arch_trap_init_quirk) {
+               if (arch_trap_init_quirk())
+                       return;
+       }
 }
 
 static struct irqaction irq0  = {
@@ -99,6 +119,16 @@ static struct irqaction irq0  = {
  **/
 void __init time_init_hook(void)
 {
+       if (arch_time_init_quirk) {
+               /*
+                * A nonzero return code does not mean failure, it means
+                * that the architecture quirk does not want any
+                * generic (timer) setup to be performed after this:
+                */
+               if (arch_time_init_quirk())
+                       return;
+       }
+
        irq0.mask = cpumask_of_cpu(0);
        setup_irq(0, &irq0);
 }
diff --git a/arch/x86/mach-visws/setup_visws.c b/arch/x86/mach-visws/setup_visws.c
new file mode 100644 (file)
index 0000000..659777f
--- /dev/null
@@ -0,0 +1,233 @@
+/*
+ *  Unmaintained SGI Visual Workstation support.
+ *  Split out from setup.c by davej@suse.de
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+
+#include <asm/arch_hooks.h>
+#include <asm/fixmap.h>
+#include <asm/reboot.h>
+#include <asm/setup.h>
+#include <asm/e820.h>
+#include <asm/io.h>
+
+#include <mach_ipi.h>
+
+#include "cobalt.h"
+#include "piix4.h"
+
+char visws_board_type  = -1;
+char visws_board_rev   = -1;
+
+static int __init visws_time_init_quirk(void)
+{
+       printk(KERN_INFO "Starting Cobalt Timer system clock\n");
+
+       /* Set the countdown value */
+       co_cpu_write(CO_CPU_TIMEVAL, CO_TIME_HZ/HZ);
+
+       /* Start the timer */
+       co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) | CO_CTRL_TIMERUN);
+
+       /* Enable (unmask) the timer interrupt */
+       co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK);
+
+       /*
+        * Zero return means the generic timer setup code will set up
+        * the standard vector:
+        */
+       return 0;
+}
+
+static int __init visws_pre_intr_init_quirk(void)
+{
+       init_VISWS_APIC_irqs();
+
+       /*
+        * We dont want ISA irqs to be set up by the generic code:
+        */
+       return 1;
+}
+
+/* Quirk for machine specific memory setup. */
+
+#define MB (1024 * 1024)
+
+unsigned long sgivwfb_mem_phys;
+unsigned long sgivwfb_mem_size;
+EXPORT_SYMBOL(sgivwfb_mem_phys);
+EXPORT_SYMBOL(sgivwfb_mem_size);
+
+long long mem_size __initdata = 0;
+
+static char * __init visws_memory_setup_quirk(void)
+{
+       long long gfx_mem_size = 8 * MB;
+
+       mem_size = boot_params.alt_mem_k;
+
+       if (!mem_size) {
+               printk(KERN_WARNING "Bootloader didn't set memory size, upgrade it !\n");
+               mem_size = 128 * MB;
+       }
+
+       /*
+        * this hardcodes the graphics memory to 8 MB
+        * it really should be sized dynamically (or at least
+        * set as a boot param)
+        */
+       if (!sgivwfb_mem_size) {
+               printk(KERN_WARNING "Defaulting to 8 MB framebuffer size\n");
+               sgivwfb_mem_size = 8 * MB;
+       }
+
+       /*
+        * Trim to nearest MB
+        */
+       sgivwfb_mem_size &= ~((1 << 20) - 1);
+       sgivwfb_mem_phys = mem_size - gfx_mem_size;
+
+       e820_add_region(0, LOWMEMSIZE(), E820_RAM);
+       e820_add_region(HIGH_MEMORY, mem_size - sgivwfb_mem_size - HIGH_MEMORY, E820_RAM);
+       e820_add_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED);
+
+       return "PROM";
+}
+
+static void visws_machine_emergency_restart(void)
+{
+       /*
+        * Visual Workstations restart after this
+        * register is poked on the PIIX4
+        */
+       outb(PIIX4_RESET_VAL, PIIX4_RESET_PORT);
+}
+
+static void visws_machine_power_off(void)
+{
+       unsigned short pm_status;
+/*     extern unsigned int pci_bus0; */
+
+       while ((pm_status = inw(PMSTS_PORT)) & 0x100)
+               outw(pm_status, PMSTS_PORT);
+
+       outw(PM_SUSPEND_ENABLE, PMCNTRL_PORT);
+
+       mdelay(10);
+
+#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
+       (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
+
+/*     outl(PCI_CONF1_ADDRESS(pci_bus0, SPECIAL_DEV, SPECIAL_REG), 0xCF8); */
+       outl(PIIX_SPECIAL_STOP, 0xCFC);
+}
+
+extern int visws_trap_init_quirk(void);
+
+void __init visws_early_detect(void)
+{
+       int raw;
+
+       visws_board_type = (char)(inb_p(PIIX_GPI_BD_REG) & PIIX_GPI_BD_REG)
+                                                        >> PIIX_GPI_BD_SHIFT;
+
+       if (visws_board_type < 0)
+               return;
+
+       /*
+        * Install special quirks for timer, interrupt and memory setup:
+        */
+       arch_time_init_quirk = visws_time_init_quirk;
+       arch_pre_intr_init_quirk = visws_pre_intr_init_quirk;
+       arch_memory_setup_quirk = visws_memory_setup_quirk;
+
+       /*
+        * Fall back to generic behavior for traps:
+        */
+       arch_intr_init_quirk = NULL;
+       arch_trap_init_quirk = visws_trap_init_quirk;
+
+       /*
+        * Install reboot quirks:
+        */
+       pm_power_off = visws_machine_power_off;
+       machine_ops.emergency_restart = visws_machine_emergency_restart;
+
+       /*
+        * Do not use broadcast IPIs:
+        */
+       no_broadcast = 0;
+
+       /*
+        * Get Board rev.
+        * First, we have to initialize the 307 part to allow us access
+        * to the GPIO registers.  Let's map them at 0x0fc0 which is right
+        * after the PIIX4 PM section.
+        */
+       outb_p(SIO_DEV_SEL, SIO_INDEX);
+       outb_p(SIO_GP_DEV, SIO_DATA);   /* Talk to GPIO regs. */
+
+       outb_p(SIO_DEV_MSB, SIO_INDEX);
+       outb_p(SIO_GP_MSB, SIO_DATA);   /* MSB of GPIO base address */
+
+       outb_p(SIO_DEV_LSB, SIO_INDEX);
+       outb_p(SIO_GP_LSB, SIO_DATA);   /* LSB of GPIO base address */
+
+       outb_p(SIO_DEV_ENB, SIO_INDEX);
+       outb_p(1, SIO_DATA);            /* Enable GPIO registers. */
+
+       /*
+        * Now, we have to map the power management section to write
+        * a bit which enables access to the GPIO registers.
+        * What lunatic came up with this shit?
+        */
+       outb_p(SIO_DEV_SEL, SIO_INDEX);
+       outb_p(SIO_PM_DEV, SIO_DATA);   /* Talk to GPIO regs. */
+
+       outb_p(SIO_DEV_MSB, SIO_INDEX);
+       outb_p(SIO_PM_MSB, SIO_DATA);   /* MSB of PM base address */
+
+       outb_p(SIO_DEV_LSB, SIO_INDEX);
+       outb_p(SIO_PM_LSB, SIO_DATA);   /* LSB of PM base address */
+
+       outb_p(SIO_DEV_ENB, SIO_INDEX);
+       outb_p(1, SIO_DATA);            /* Enable PM registers. */
+
+       /*
+        * Now, write the PM register which enables the GPIO registers.
+        */
+       outb_p(SIO_PM_FER2, SIO_PM_INDEX);
+       outb_p(SIO_PM_GP_EN, SIO_PM_DATA);
+
+       /*
+        * Now, initialize the GPIO registers.
+        * We want them all to be inputs which is the
+        * power on default, so let's leave them alone.
+        * So, let's just read the board rev!
+        */
+       raw = inb_p(SIO_GP_DATA1);
+       raw &= 0x7f;    /* 7 bits of valid board revision ID. */
+
+       if (visws_board_type == VISWS_320) {
+               if (raw < 0x6) {
+                       visws_board_rev = 4;
+               } else if (raw < 0xc) {
+                       visws_board_rev = 5;
+               } else {
+                       visws_board_rev = 6;
+               }
+       } else if (visws_board_type == VISWS_540) {
+                       visws_board_rev = 2;
+               } else {
+                       visws_board_rev = raw;
+               }
+
+       printk(KERN_INFO "Silicon Graphics Visual Workstation %s (rev %d) detected\n",
+              (visws_board_type == VISWS_320 ? "320" :
+              (visws_board_type == VISWS_540 ? "540" :
+               "unknown")), visws_board_rev);
+}
index dd1f5fa94210ef1a5a68b01cd5e220098bc7a4b2..8a160ec147f768a1ba7f75b50e90200d2419a61c 100644 (file)
@@ -62,8 +62,10 @@ static __init void cobalt_init(void)
                co_apic_read(CO_APIC_ID));
 }
 
-void __init trap_init_hook_dontuse(void)
+int __init visws_trap_init_quirk(void)
 {
        lithium_init();
        cobalt_init();
+
+       return 1;
 }
index 8b1cd8e01cb4753e8f71cc7aadca266b5d5d7550..d8b2cfd85d92c4d6275727c95fbbf9d6cb2c3c51 100644 (file)
@@ -25,9 +25,6 @@
 
 #include "cobalt.h"
 
-char visws_board_type = -1;
-char visws_board_rev = -1;
-
 static DEFINE_SPINLOCK(cobalt_lock);
 
 /*
index fa0164d80bbd5e2459e91daedbbfff3470b1a598..c03c2094864f75481024f05507a538dd1ba7ac95 100644 (file)
@@ -11,7 +11,7 @@ pci-y                         += legacy.o irq.o
 
 # Careful: VISWS overrule the pci-y above. The colons are
 # therefor correct. This needs a proper fix by distangling the code.
-#pci-$(CONFIG_X86_VISWS)               := visws.o irq.o fixup.o
+pci-$(CONFIG_X86_VISWS)                += visws.o
 
 pci-$(CONFIG_X86_NUMAQ)                += numa.o
 
index 343ccf668d1457ac473e47eecc5564b3f9c9a5f6..2e022210a6327ed154f93220ace934d474988260 100644 (file)
@@ -107,7 +107,11 @@ static int __init pci_visws_init(void)
 
 static __init int pci_subsys_init(void)
 {
+       return -1;
+
        pci_visws_init();
        pcibios_init();
+
+       return 0;
 }
 subsys_initcall(pci_subsys_init);
index 3452cf59eed0ba9b4cf386c17d0667abd4241727..4d1ce2e7361e41cfee2b35b5da3025f7641e2e4b 100644 (file)
@@ -37,7 +37,7 @@ obj-$(CONFIG_SUPERH) += setup-bus.o setup-irq.o
 obj-$(CONFIG_PPC32) += setup-irq.o
 obj-$(CONFIG_PPC) += setup-bus.o
 obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
-#obj-$(CONFIG_X86_VISWS) += setup-irq.o
+obj-$(CONFIG_X86_VISWS) += setup-irq.o
 obj-$(CONFIG_MN10300) += setup-bus.o
 
 #