]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit
authorChris Dearman <chris@mips.com>
Fri, 21 Sep 2007 13:50:08 +0000 (14:50 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 28 Apr 2008 16:14:26 +0000 (17:14 +0100)
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mips-boards/generic/init.c
include/asm-mips/mips-boards/generic.h

index 1695dca5506bbe7e008221ca400836ff97446703..07671fb9074f570ea60baeae49c66f035a644862 100644 (file)
@@ -295,15 +295,21 @@ void __init prom_init(void)
                        break;
                case MIPS_REVISION_CORID_CORE_MSC:
                case MIPS_REVISION_CORID_CORE_FPGA2:
-               case MIPS_REVISION_CORID_CORE_FPGA3:
-               case MIPS_REVISION_CORID_CORE_FPGA4:
                case MIPS_REVISION_CORID_CORE_24K:
-               case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+                       /*
+                        * SOCit/ROCit support is essentially identical
+                        * but make an attempt to distinguish them
+                        */
                        mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
                        break;
+               case MIPS_REVISION_CORID_CORE_FPGA3:
+               case MIPS_REVISION_CORID_CORE_FPGA4:
+               case MIPS_REVISION_CORID_CORE_FPGA5:
+               case MIPS_REVISION_CORID_CORE_EMUL_MSC:
                default:
-                       mips_display_message("CC Error");
-                       while (1);   /* We die here... */
+                       /* See above */
+                       mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
+                       break;
                }
        }
 
index 1c39d339521e8220fd6bbb16fc29e26f49717705..33407bee4e73691a8040bc5d3fc3771d0c2b07e1 100644 (file)
@@ -68,6 +68,7 @@
 #define MIPS_REVISION_CORID_CORE_FPGA3     9
 #define MIPS_REVISION_CORID_CORE_24K       10
 #define MIPS_REVISION_CORID_CORE_FPGA4     11
+#define MIPS_REVISION_CORID_CORE_FPGA5     12
 
 /**** Artificial corid defines ****/
 /*