x86: move GART TLB flushing options to generic code

The GART currently implements the iommu=[no]fullflush command line
parameters which influence its IO/TLB flushing strategy. This patch
makes these parameters generic so that they can be used by the AMD IOMMU
too.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 1150444a21ab64140f13e706797f16664e28244f..40066ceb48fe186a4c4c9b6dfa67bc0413b9faba 100644 (file)
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -893,6 +893,10 @@ and is between 256 and 4096 characters. It is defined in the file
                nomerge
                forcesac
                soft
+               fullflush
+                       Flush IO/TLB at every deallocation
+               nofullflush
+                       Flush IO/TLB only when addresses are reused (default)
 
 
        intel_iommu=    [DMAR] Intel IOMMU driver (DMAR) option

diff --git a/Documentation/x86/x86_64/boot-options.txt b/Documentation/x86/x86_64/boot-options.txt
index b0c7b6c4abda9362e38955dfee572a064dd6b992..c83c8e4bc8e5f58af05c02e7551558166b89cbc7 100644 (file)
--- a/Documentation/x86/x86_64/boot-options.txt
+++ b/Documentation/x86/x86_64/boot-options.txt
@@ -233,8 +233,6 @@ IOMMU (input/output memory management unit)
   iommu options only relevant to the AMD GART hardware IOMMU:
     <size>             Set the size of the remapping area in bytes.
     allowed            Overwrite iommu off workarounds for specific chipsets.
-    fullflush          Flush IOMMU on each allocation (default).
-    nofullflush        Don't use IOMMU fullflush.
     leak               Turn on simple iommu leak tracing (only when
                        CONFIG_IOMMU_LEAK is on). Default number of leak pages
                        is 20.

diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 0a1408abcc6244c832eb4801175dcec135cface4..d2f2c0158dc12f04021122740f42a63e5c17d195 100644 (file)
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -16,6 +16,15 @@ EXPORT_SYMBOL(dma_ops);
 
 static int iommu_sac_force __read_mostly;
 
+/*
+ * If this is disabled the IOMMU will use an optimized flushing strategy
+ * of only flushing when an mapping is reused. With it true the GART is
+ * flushed for every mapping. Problem is that doing the lazy flush seems
+ * to trigger bugs with some popular PCI cards, in particular 3ware (but
+ * has been also also seen with Qlogic at least).
+ */
+int iommu_fullflush;
+
 #ifdef CONFIG_IOMMU_DEBUG
 int panic_on_overflow __read_mostly = 1;
 int force_iommu __read_mostly = 1;
@@ -171,6 +180,10 @@ static __init int iommu_setup(char *p)
                }
                if (!strncmp(p, "nomerge", 7))
                        iommu_merge = 0;
+               if (!strncmp(p, "fullflush", 8))
+                       iommu_fullflush = 1;
+               if (!strncmp(p, "nofullflush", 11))
+                       iommu_fullflush = 0;
                if (!strncmp(p, "forcesac", 8))
                        iommu_sac_force = 1;
                if (!strncmp(p, "allowdac", 8))

diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 9739d568209349bae16d212b0f70e3c3d00e9aa2..508ef470b27f09649e298f25ce0320c57939f156 100644 (file)
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -45,15 +45,6 @@ static unsigned long iommu_pages;    /* .. and in pages */
 
 static u32 *iommu_gatt_base;           /* Remapping table */
 
-/*
- * If this is disabled the IOMMU will use an optimized flushing strategy
- * of only flushing when an mapping is reused. With it true the GART is
- * flushed for every mapping. Problem is that doing the lazy flush seems
- * to trigger bugs with some popular PCI cards, in particular 3ware (but
- * has been also also seen with Qlogic at least).
- */
-int iommu_fullflush = 1;
-
 /* Allocation bitmap for the remapping area: */
 static DEFINE_SPINLOCK(iommu_bitmap_lock);
 /* Guarded by iommu_bitmap_lock: */
@@ -901,10 +892,6 @@ void __init gart_parse_options(char *p)
 #endif
        if (isdigit(*p) && get_option(&p, &arg))
                iommu_size = arg;
-       if (!strncmp(p, "fullflush", 8))
-               iommu_fullflush = 1;
-       if (!strncmp(p, "nofullflush", 11))
-               iommu_fullflush = 0;
        if (!strncmp(p, "noagp", 5))
                no_agp = 1;
        if (!strncmp(p, "noaperture", 10))

diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h
index 621a1af94c4c1bc0fc1840b1e4ac95c95364e7f6..67b2fd56c6da662f0607605c8b59ffacf75001ea 100644 (file)
--- a/include/asm-x86/iommu.h
+++ b/include/asm-x86/iommu.h
@@ -7,6 +7,7 @@ extern struct dma_mapping_ops nommu_dma_ops;
 extern int force_iommu, no_iommu;
 extern int iommu_detected;
 extern int dmar_disabled;
+extern int iommu_fullflush;
 
 extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len);