Remove usbhost_sar_fclk from the OMAP3 clock framework.  The bit that
the clock was tweaking doesn't actually enable or disable a clock; it
controls whether the hardware will save and restore USBHOST state
when the powerdomain changes state.  (That happens to coincidentally
enable a clock for the duration of the operation, hence the earlier
confusion.)
In place of the clock, mark the USBHOST powerdomain as supporting
hardware save-and-restore functionality.
linux-omap source commit is 
f3ceac86a9d425d101d606d87a5af44afef27179.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
        CLK(NULL,       "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2),
        CLK(NULL,       "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2),
        CLK(NULL,       "usbhost_ick",  &usbhost_ick,   CK_3430ES2),
-       CLK(NULL,       "usbhost_sar_fck", &usbhost_sar_fck, CK_3430ES2),
        CLK(NULL,       "usim_fck",     &usim_fck,      CK_3430ES2),
        CLK(NULL,       "gpt1_fck",     &gpt1_fck,      CK_343X),
        CLK(NULL,       "wkup_32k_fck", &wkup_32k_fck,  CK_343X),
 
        .recalc         = &followparent_recalc,
 };
 
-static struct clk usbhost_sar_fck = {
-       .name           = "usbhost_sar_fck",
-       .ops            = &clkops_omap2_dflt,
-       .parent         = &osc_sys_ck,
-       .init           = &omap2_init_clk_clkdm,
-       .enable_reg     = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL),
-       .enable_bit     = OMAP3430ES2_SAVEANDRESTORE_SHIFT,
-       .clkdm_name     = "usbhost_clkdm",
-       .recalc         = &followparent_recalc,
-};
-
 /* WKUP */
 
 static const struct clksel_rate usim_96m_rates[] = {
 
        .sleepdep_srcs    = dss_per_usbhost_sleepdeps,
        .pwrsts           = PWRSTS_OFF_RET_ON,
        .pwrsts_logic_ret = PWRDM_POWER_RET,
+       .flags            = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */
        .banks            = 1,
        .pwrsts_mem_ret   = {
                [0] = PWRDM_POWER_RET, /* MEMRETSTATE */