ARM: OMAP: Fix USB peripheral DMA for omap1

Fix USB peripheral DMA for omap1. This got broken by
patch e1528b547b90079b8eaa37bf1b0739c35d4faa08.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 1bb6a561d99a1dbdbaa5f252e71542cf46709827..42c03595650c89e29c940e2e2102fc34e04a3dc7 100644 (file)
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -363,6 +363,19 @@ void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
 }
 EXPORT_SYMBOL(omap_set_dma_write_mode);
 
+void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
+{
+       if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
+               u32 l;
+
+               l = dma_read(LCH_CTRL(lch));
+               l &= ~0x7;
+               l |= mode;
+               dma_write(l, LCH_CTRL(lch));
+       }
+}
+EXPORT_SYMBOL(omap_set_dma_channel_mode);
+
 /* Note that src_port is only for omap1 */
 void omap_set_dma_src_params(int lch, int src_port, int src_amode,
                             unsigned long src_start,
@@ -1010,13 +1023,16 @@ dma_addr_t omap_get_dma_src_pos(int lch)
 {
        dma_addr_t offset = 0;
 
-       offset = dma_read(CSAC(lch));
+       if (cpu_is_omap15xx())
+               offset = dma_read(CPC(lch));
+       else
+               offset = dma_read(CSAC(lch));
 
        /*
         * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
         * read before the DMA controller finished disabling the channel.
         */
-       if (offset == 0)
+       if (!cpu_is_omap15xx() && offset == 0)
                offset = dma_read(CSAC(lch));
 
        if (cpu_class_is_omap1())
@@ -1038,13 +1054,16 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
 {
        dma_addr_t offset = 0;
 
-       offset = dma_read(CDAC(lch));
+       if (cpu_is_omap15xx())
+               offset = dma_read(CPC(lch));
+       else
+               offset = dma_read(CDAC(lch));
 
        /*
         * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
         * read before the DMA controller finished disabling the channel.
         */
-       if (offset == 0)
+       if (!cpu_is_omap15xx() && offset == 0)
                offset = dma_read(CDAC(lch));
 
        if (cpu_class_is_omap1())

diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 9d274c9f081deacc986f7f885232c8ac9207c54d..22aabd45b921337a1f5986050bc875f91d64b3bf 100644 (file)
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -805,8 +805,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 
                /* channel type P: hw synch (fifo) */
                if (cpu_class_is_omap1() && !cpu_is_omap15xx())
-                       omap_set_dma_color_mode(ep->lch,
-                                       OMAP_DMA_TRANSPARENT_COPY, 0);
+                       omap_set_dma_channel_mode(ep->lch, OMAP_DMA_LCH_P);
        }
 
 just_restart:

diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h
index a12ac9ddf441411672b2368966ddd82e782100c8..ee8e607528b21a87a5ccdd9a37a9a8d80f7c4386 100644 (file)
--- a/include/asm-arm/arch-omap/dma.h
+++ b/include/asm-arm/arch-omap/dma.h
@@ -79,6 +79,7 @@
 #define OMAP1_DMA_CFN(n)               (0x40 * (n) + 0x12)
 #define OMAP1_DMA_CSFI(n)              (0x40 * (n) + 0x14)
 #define OMAP1_DMA_CSEI(n)              (0x40 * (n) + 0x16)
+#define OMAP1_DMA_CPC(n)               (0x40 * (n) + 0x18)     /* 15xx only */
 #define OMAP1_DMA_CSAC(n)              (0x40 * (n) + 0x18)
 #define OMAP1_DMA_CDAC(n)              (0x40 * (n) + 0x1a)
 #define OMAP1_DMA_CDEI(n)              (0x40 * (n) + 0x1c)
@@ -107,9 +108,9 @@
 #define OMAP1_DMA_CDSA_L(n)            (0x40 * (n) + 0x0c)
 #define OMAP1_DMA_CDSA_U(n)            (0x40 * (n) + 0x0e)
 #define OMAP1_DMA_COLOR_L(n)           (0x40 * (n) + 0x20)
-#define OMAP1_DMA_CCR2(n)              (0x40 * (n) + 0x24)
 #define OMAP1_DMA_COLOR_U(n)           (0x40 * (n) + 0x22)
-#define OMAP1_DMA_LCH_CTRL(n)          (0x40 * (n) + 0x2a)
+#define OMAP1_DMA_CCR2(n)              (0x40 * (n) + 0x24)
+#define OMAP1_DMA_LCH_CTRL(n)          (0x40 * (n) + 0x2a)     /* not on 15xx */
 #define OMAP1_DMA_CCEN(n)              0
 #define OMAP1_DMA_CCFN(n)              0
 
@@ -131,6 +132,7 @@
 #define OMAP_DMA4_CAPS_1_L             0
 #define OMAP_DMA4_CAPS_1_U             0
 #define OMAP_DMA4_GSCR                 0
+#define OMAP_DMA4_CPC(n)               0
 
 #define OMAP_DMA4_LCH_CTRL(n)          0
 #define OMAP_DMA4_COLOR_L(n)           0
@@ -429,6 +431,13 @@ enum omap_dma_write_mode {
        OMAP_DMA_WRITE_LAST_NON_POSTED
 };
 
+enum omap_dma_channel_mode {
+       OMAP_DMA_LCH_2D = 0,
+       OMAP_DMA_LCH_G,
+       OMAP_DMA_LCH_P,
+       OMAP_DMA_LCH_PD
+};
+
 struct omap_dma_channel_params {
        int data_type;          /* data type 8,16,32 */
        int elem_count;         /* number of elements in a frame */
@@ -480,6 +489,7 @@ extern void omap_set_dma_transfer_params(int lch, int data_type,
 extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
                                    u32 color);
 extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
+extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
 
 extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
                                    unsigned long src_start,