]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
cxgb3 - Set the CQ_ERR bit in CQ contexts.
authorDivy Le Ray <divy@chelsio.com>
Wed, 5 Sep 2007 22:58:25 +0000 (15:58 -0700)
committerDavid S. Miller <davem@sunset.davemloft.net>
Wed, 10 Oct 2007 23:51:05 +0000 (16:51 -0700)
The cxgb3 driver is incorrectly configuring the HW CQ context for CQ's
that use overflow-avoidance.  Namely the RDMA control CQ.  This results
in a bad DMA from the device to bus address 0.  The solution is to set
the CQ_ERR bit in the context for these types of CQs.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/net/cxgb3/sge_defs.h
drivers/net/cxgb3/t3_hw.c

index 514869e26a767542233d897d0dd52c5477f3d8ab..29b6c800b23840732756986bf12e92c71c979ee2 100644 (file)
 #define V_CQ_GEN(x) ((x) << S_CQ_GEN)
 #define F_CQ_GEN    V_CQ_GEN(1U)
 
+#define S_CQ_ERR    30
+#define V_CQ_ERR(x) ((x) << S_CQ_ERR)
+#define F_CQ_ERR    V_CQ_ERR(1U)
+
 #define S_CQ_OVERFLOW_MODE    31
 #define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE)
 #define F_CQ_OVERFLOW_MODE    V_CQ_OVERFLOW_MODE(1U)
index cdcfc132e37da8ca8f0ad746a5a533e6226b8e91..bff1d028a96b4290eae4cbef3c4d77f629d5905b 100644 (file)
@@ -2046,7 +2046,8 @@ int t3_sge_init_cqcntxt(struct adapter *adapter, unsigned int id, u64 base_addr,
        base_addr >>= 32;
        t3_write_reg(adapter, A_SG_CONTEXT_DATA2,
                     V_CQ_BASE_HI((u32) base_addr) | V_CQ_RSPQ(rspq) |
-                    V_CQ_GEN(1) | V_CQ_OVERFLOW_MODE(ovfl_mode));
+                    V_CQ_GEN(1) | V_CQ_OVERFLOW_MODE(ovfl_mode) |
+                    V_CQ_ERR(ovfl_mode));
        t3_write_reg(adapter, A_SG_CONTEXT_DATA3, V_CQ_CREDITS(credits) |
                     V_CQ_CREDIT_THRES(credit_thres));
        return t3_sge_write_context(adapter, id, F_CQ);