powerpc/xics: Reduce and comment xics IPI use of memory barriers

A single full sync (mb()) is requrired to order the mmio to the qirr reg
with the set or clear of the message word.  However, test_and_clear_bit
has the effect of smp_mb() and we are not doing any other io from here,
so we don't need a mb per bit processed.

Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 62b0400577ded3fa9f84c29dc2ab1aed145a7331..e1904774a70fecd21673f6e899d89251905f91d3 100644 (file)
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -498,26 +498,23 @@ static irqreturn_t xics_ipi_dispatch(int cpu)
 {
        WARN_ON(cpu_is_offline(cpu));
 
+       mb();   /* order mmio clearing qirr */
        while (xics_ipi_message[cpu].value) {
                if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
                                       &xics_ipi_message[cpu].value)) {
-                       mb();
                        smp_message_recv(PPC_MSG_CALL_FUNCTION);
                }
                if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
                                       &xics_ipi_message[cpu].value)) {
-                       mb();
                        smp_message_recv(PPC_MSG_RESCHEDULE);
                }
                if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
                                       &xics_ipi_message[cpu].value)) {
-                       mb();
                        smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
                }
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
                if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
                                       &xics_ipi_message[cpu].value)) {
-                       mb();
                        smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
                }
 #endif