]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[PATCH] fbdev: Rearrange mode database entries
authorAntonino A. Daplas <adaplas@gmail.com>
Mon, 7 Nov 2005 09:00:53 +0000 (01:00 -0800)
committerLinus Torvalds <torvalds@g5.osdl.org>
Mon, 7 Nov 2005 15:53:52 +0000 (07:53 -0800)
Rearrange mode database entries such that preferred timings are entered first,
and less preferred timings are entered last.  (Detailed, VESA,
established/standard).

Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
drivers/video/fbmon.c

index 442a52d10913a59afc58ccf57ba2e8b81ea56e8f..fc7965b66775983a97d62d10ab7805c475e0eb73 100644 (file)
@@ -538,25 +538,12 @@ static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize)
 
        *dbsize = 0;
 
-       DPRINTK("   Supported VESA Modes\n");
-       block = edid + ESTABLISHED_TIMING_1;
-       num += get_est_timing(block, &mode[num]);
-
-       DPRINTK("   Standard Timings\n");
-       block = edid + STD_TIMING_DESCRIPTIONS_START;
-       for (i = 0; i < STD_TIMING; i++, block += STD_TIMING_DESCRIPTION_SIZE) 
-               num += get_std_timing(block, &mode[num]);
-
        DPRINTK("   Detailed Timings\n");
        block = edid + DETAILED_TIMING_DESCRIPTIONS_START;
        for (i = 0; i < 4; i++, block+= DETAILED_TIMING_DESCRIPTION_SIZE) {
                int first = 1;
 
-               if (block[0] == 0x00 && block[1] == 0x00) {
-                       if (block[3] == 0xfa) {
-                               num += get_dst_timing(block + 5, &mode[num]);
-                       }
-               } else  {
+               if (!(block[0] == 0x00 && block[1] == 0x00)) {
                        get_detailed_timing(block, &mode[num]);
                        if (first) {
                                mode[num].flag |= FB_MODE_IS_FIRST;
@@ -565,6 +552,21 @@ static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize)
                        num++;
                }
        }
+
+       DPRINTK("   Supported VESA Modes\n");
+       block = edid + ESTABLISHED_TIMING_1;
+       num += get_est_timing(block, &mode[num]);
+
+       DPRINTK("   Standard Timings\n");
+       block = edid + STD_TIMING_DESCRIPTIONS_START;
+       for (i = 0; i < STD_TIMING; i++, block += STD_TIMING_DESCRIPTION_SIZE)
+               num += get_std_timing(block, &mode[num]);
+
+       block = edid + DETAILED_TIMING_DESCRIPTIONS_START;
+       for (i = 0; i < 4; i++, block+= DETAILED_TIMING_DESCRIPTION_SIZE) {
+               if (block[0] == 0x00 && block[1] == 0x00 && block[3] == 0xfa)
+                       num += get_dst_timing(block + 5, &mode[num]);
+       }
        
        /* Yikes, EDID data is totally useless */
        if (!num) {