[PATCH] sh: Make peripheral clock frequency setting mandatory

Pretty much every subtype does this now anyways, and as we depend on it in a
few places being set to something sensible quite early on, it's better for a
new subtype to simply set a sensible default.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 01bc7d589afe5afd4d43c0734548c89488f6aa85..504d56f8ca7fce9a674a8b8875714b446c7cb338 100644 (file)
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -396,14 +396,8 @@ source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
 
 source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
 
-config SH_PCLK_FREQ_BOOL
-       bool "Set default pclk frequency"
-       default y if !SH_RTC
-       default n
-
 config SH_PCLK_FREQ
        int "Peripheral clock frequency (in Hz)"
-       depends on SH_PCLK_FREQ_BOOL
        default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
        default "60000000" if CPU_SUBTYPE_SH7751
        default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760

diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 989e7fdd524d458d69abdb73537a606fdb9ecaea..97fa37f42b841e2bcaabbef4e07a933fad0fb73b 100644 (file)
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -38,9 +38,7 @@ static DECLARE_MUTEX(clock_list_sem);
 static struct clk master_clk = {
        .name           = "master_clk",
        .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
-#ifdef CONFIG_SH_PCLK_FREQ_BOOL
        .rate           = CONFIG_SH_PCLK_FREQ,
-#endif
 };
 
 static struct clk module_clk = {
@@ -227,16 +225,7 @@ int __init clk_init(void)
 {
        int i, ret = 0;
 
-       if (unlikely(!master_clk.rate))
-               /*
-                * NOTE: This will break if the default divisor has been
-                * changed.
-                *
-                * No one should be changing the default on us however,
-                * expect that a sane value for CONFIG_SH_PCLK_FREQ will
-                * be defined in the event of a different divisor.
-                */
-               master_clk.rate = get_timer_frequency() * 4;
+       BUG_ON(unlikely(!master_clk.rate));
 
        for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
                struct clk *clk = onchip_clocks[i];