{
u32 cval, i=0;
- if (clk->enable_bit == 0xff) /* Parent will do it */
+ if (clk->enable_bit == PARENT_CONTROLS_CLOCK) /* Parent will do it */
return;
cval = CM_CLKEN_PLL;
{
u32 cval;
- if(clk->enable_bit == 0xff) /* let parent off do it */
- return;
+ if (clk->enable_bit == PARENT_CONTROLS_CLOCK)
+ return; /* let parent off do it */
cval = CM_CLKEN_PLL;
cval &= ~(0x3 << clk->enable_bit);
static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val);
static u32 omap2_clksel_get_divisor(struct clk *clk);
+/* REVISIT: should use a clock flag for this, not a magic number */
+#define PARENT_CONTROLS_CLOCK 0xff
#define RATE_IN_242X (1 << 0)
#define RATE_IN_243X (1 << 1)
RATE_FIXED | CM_PLL_SEL1 | RATE_PROPAGATES,
.src_offset = 5,
.enable_reg = (void __iomem *)&CM_CLKEN_PLL,
- .enable_bit = 0xff,
+ .enable_bit = PARENT_CONTROLS_CLOCK,
.recalc = &omap2_propagate_rate,
};
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | RATE_PROPAGATES,
.enable_reg = (void __iomem *)&CM_CLKEN_PLL,
- .enable_bit = 0xff,
+ .enable_bit = PARENT_CONTROLS_CLOCK,
.recalc = &omap2_propagate_rate,
};
RATE_FIXED | CM_PLL_SEL1 | RATE_PROPAGATES,
.src_offset = 3,
.enable_reg = (void __iomem *)&CM_CLKEN_PLL,
- .enable_bit = 0xff,
+ .enable_bit = PARENT_CONTROLS_CLOCK,
.recalc = &omap2_propagate_rate,
};
RATE_FIXED | RATE_PROPAGATES,
.recalc = &omap2_propagate_rate,
.enable_reg = (void __iomem *)&CM_CLKEN_PLL,
- .enable_bit = 0xff,
+ .enable_bit = PARENT_CONTROLS_CLOCK,
};
/* Secure timer, only available in secure mode */