]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
powerpc/83xx: Add power management support for MPC837x boards
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Thu, 19 Mar 2009 18:01:42 +0000 (21:01 +0300)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 24 Mar 2009 13:34:19 +0000 (08:34 -0500)
This patch adds pmc nodes to the device tree files so that the boards
will able to use standby capability of MPC837x processors. The MPC837x
PMC controllers are compatible with MPC8349 ones (i.e. no deep sleep).

sleep = <> properties are used to specify SCCR masks as described
in "Specifying Device Power Management Information (sleep property)"
chapter in Documentation/powerpc/booting-without-of.txt.

Since I2C1 and eSDHC controllers share the same clock source, they
are now placed under sleep-nexus nodes.

A processor is able to wakeup the boards on LAN events (Wake-On-Lan),
console events (with no_console_suspend kernel command line), GPIO
events and external IRQs (IRQ1 and IRQ2).

The processor can also wakeup the boards by the fourth general purpose
timer in GTM1 block, but the GTM wakeup support isn't yet implemented
(it's tested to work, but it's unclear how can we use the quite short
GTM timers, and how do we want to expose the GTM to userspace).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/mpc8377_mds.dts
arch/powerpc/boot/dts/mpc8377_rdb.dts
arch/powerpc/boot/dts/mpc8378_mds.dts
arch/powerpc/boot/dts/mpc8378_rdb.dts
arch/powerpc/boot/dts/mpc8379_mds.dts
arch/powerpc/boot/dts/mpc8379_rdb.dts

index 3e3ec8fdef495a16632366b02c90fcd1f593b049..cebfc50f4ce5f2e6c1f859bd7cac38f53fad695c 100644 (file)
                        reg = <0x200 0x100>;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1374";
-                               reg = <0x68>;
-                               interrupts = <19 0x8>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
                                interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1374";
+                                       reg = <0x68>;
+                                       interrupts = <19 0x8>;
+                                       interrupt-parent = <&ipic>;
+                               };
+                       };
+
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupts = <38 0x8>;
                        dr_mode = "host";
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi1>;
                        phy-handle = <&phy3>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                sata@18000 {
                        reg = <0x18000 0x1000>;
                        interrupts = <44 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x000000c0>;
                };
 
                sata@19000 {
                        reg = <0x19000 0x1000>;
                        interrupts = <45 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000030>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+               sleep = <&pmc 0x00010000>;
                clock-frequency = <0>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
                                 0 0 0 2 &ipic 1 8
                                 0 0 0 3 &ipic 1 8
                                 0 0 0 4 &ipic 1 8>;
+               sleep = <&pmc 0x00300000>;
                clock-frequency = <0>;
 
                pcie@0 {
                                 0 0 0 2 &ipic 2 8
                                 0 0 0 3 &ipic 2 8
                                 0 0 0 4 &ipic 2 8>;
+               sleep = <&pmc 0x000c0000>;
                clock-frequency = <0>;
 
                pcie@0 {
index fb1d884348ecef52d9ba2d5cabfa2403a23aa379..32311c8f55d82e9723024d525555d5d0368f4e64 100644 (file)
                        gpio-controller;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
-
-                       dtt@48 {
-                               compatible = "national,lm75";
-                               reg = <0x48>;
-                       };
-
-                       at24@50 {
-                               compatible = "at24,24c256";
-                               reg = <0x50>;
-                       };
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1339";
-                               reg = <0x68>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
+                               interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               dtt@48 {
+                                       compatible = "national,lm75";
+                                       reg = <0x48>;
+                               };
+
+                               at24@50 {
+                                       compatible = "at24,24c256";
+                                       reg = <0x50>;
+                               };
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1339";
+                                       reg = <0x68>;
+                               };
+
+                               mcu_pio: mcu@a {
+                                       #gpio-cells = <2>;
+                                       compatible = "fsl,mc9s08qg8-mpc8377erdb",
+                                                    "fsl,mcu-mpc8349emitx";
+                                       reg = <0x0a>;
+                                       gpio-controller;
+                               };
                        };
 
-                       mcu_pio: mcu@a {
-                               #gpio-cells = <2>;
-                               compatible = "fsl,mc9s08qg8-mpc8377erdb",
-                                            "fsl,mcu-mpc8349emitx";
-                               reg = <0x0a>;
-                               gpio-controller;
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupt-parent = <&ipic>;
                        interrupts = <38 0x8>;
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        interrupt-parent = <&ipic>;
                        fixed-link = <1 1 1000 0 0>;
                        tbi-handle = <&tbi1>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                sata@18000 {
                        reg = <0x18000 0x1000>;
                        interrupts = <44 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x000000c0>;
                };
 
                sata@19000 {
                        reg = <0x19000 0x1000>;
                        interrupts = <45 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000030>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+               sleep = <&pmc 0x00010000>;
                clock-frequency = <66666666>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
                                 0 0 0 2 &ipic 1 8
                                 0 0 0 3 &ipic 1 8
                                 0 0 0 4 &ipic 1 8>;
+               sleep = <&pmc 0x00300000>;
                clock-frequency = <0>;
 
                pcie@0 {
                                 0 0 0 2 &ipic 2 8
                                 0 0 0 3 &ipic 2 8
                                 0 0 0 4 &ipic 2 8>;
+               sleep = <&pmc 0x000c0000>;
                clock-frequency = <0>;
 
                pcie@0 {
index c3b212cf9025dfc9d763a802996df6bd7bae97b4..155841d4db29fa2d752bd7579aa384cff0f6e38c 100644 (file)
                        reg = <0x200 0x100>;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1374";
-                               reg = <0x68>;
-                               interrupts = <19 0x8>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
                                interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1374";
+                                       reg = <0x68>;
+                                       interrupts = <19 0x8>;
+                                       interrupt-parent = <&ipic>;
+                               };
+                       };
+
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupts = <38 0x8>;
                        dr_mode = "host";
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi1>;
                        phy-handle = <&phy3>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
                clock-frequency = <0>;
+               sleep = <&pmc 0x00010000>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
                                 0 0 0 2 &ipic 1 8
                                 0 0 0 3 &ipic 1 8
                                 0 0 0 4 &ipic 1 8>;
+               sleep = <&pmc 0x00300000>;
                clock-frequency = <0>;
 
                pcie@0 {
                                 0 0 0 2 &ipic 2 8
                                 0 0 0 3 &ipic 2 8
                                 0 0 0 4 &ipic 2 8>;
+               sleep = <&pmc 0x000c0000>;
                clock-frequency = <0>;
 
                pcie@0 {
index 37c8555cc8d45337f7bfa929aba1b27153c01384..54ad96c1fc8ba469cb5bf1ee1356c67b56cfbfba 100644 (file)
                        gpio-controller;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
-
-                       dtt@48 {
-                               compatible = "national,lm75";
-                               reg = <0x48>;
-                       };
-
-                       at24@50 {
-                               compatible = "at24,24c256";
-                               reg = <0x50>;
-                       };
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1339";
-                               reg = <0x68>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
+                               interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               dtt@48 {
+                                       compatible = "national,lm75";
+                                       reg = <0x48>;
+                               };
+
+                               at24@50 {
+                                       compatible = "at24,24c256";
+                                       reg = <0x50>;
+                               };
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1339";
+                                       reg = <0x68>;
+                               };
+
+                               mcu_pio: mcu@a {
+                                       #gpio-cells = <2>;
+                                       compatible = "fsl,mc9s08qg8-mpc8378erdb",
+                                                    "fsl,mcu-mpc8349emitx";
+                                       reg = <0x0a>;
+                                       gpio-controller;
+                               };
                        };
 
-                       mcu_pio: mcu@a {
-                               #gpio-cells = <2>;
-                               compatible = "fsl,mc9s08qg8-mpc8378erdb",
-                                            "fsl,mcu-mpc8349emitx";
-                               reg = <0x0a>;
-                               gpio-controller;
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupt-parent = <&ipic>;
                        interrupts = <38 0x8>;
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        phy-connection-type = "mii";
                        interrupt-parent = <&ipic>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        phy-connection-type = "mii";
                        interrupt-parent = <&ipic>;
                        fixed-link = <1 1 1000 0 0>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+               sleep = <&pmc 0x00010000>;
                clock-frequency = <66666666>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
                                 0 0 0 2 &ipic 1 8
                                 0 0 0 3 &ipic 1 8
                                 0 0 0 4 &ipic 1 8>;
+               sleep = <&pmc 0x00300000>;
                clock-frequency = <0>;
 
                pcie@0 {
                                 0 0 0 2 &ipic 2 8
                                 0 0 0 3 &ipic 2 8
                                 0 0 0 4 &ipic 2 8>;
+               sleep = <&pmc 0x000c0000>;
                clock-frequency = <0>;
 
                pcie@0 {
index 1b61cda1eb47b48c348d7d31f918f0d9a89ef67d..9deb5b20f8af6810add643234448a0936f209877 100644 (file)
                        reg = <0x200 0x100>;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1374";
-                               reg = <0x68>;
-                               interrupts = <19 0x8>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
                                interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1374";
+                                       reg = <0x68>;
+                                       interrupts = <19 0x8>;
+                                       interrupt-parent = <&ipic>;
+                               };
+                       };
+
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupts = <38 0x8>;
                        dr_mode = "host";
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi1>;
                        phy-handle = <&phy3>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                sata@18000 {
                        reg = <0x18000 0x1000>;
                        interrupts = <44 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x000000c0>;
                };
 
                sata@19000 {
                        reg = <0x19000 0x1000>;
                        interrupts = <45 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000030>;
                };
 
                sata@1a000 {
                        reg = <0x1a000 0x1000>;
                        interrupts = <46 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x0000000c>;
                };
 
                sata@1b000 {
                        reg = <0x1b000 0x1000>;
                        interrupts = <47 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000003>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+               sleep = <&pmc 0x00010000>;
                clock-frequency = <0>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
index e2f98e6a51a2fb97b3175a9a8e151b590a2f1a7b..3f4778ff93331728907136ac9517f312b4838ddc 100644 (file)
                        gpio-controller;
                };
 
-               i2c@3000 {
+               sleep-nexus {
                        #address-cells = <1>;
-                       #size-cells = <0>;
-                       cell-index = <0>;
-                       compatible = "fsl-i2c";
-                       reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
-                       interrupt-parent = <&ipic>;
-                       dfsrr;
-
-                       dtt@48 {
-                               compatible = "national,lm75";
-                               reg = <0x48>;
-                       };
-
-                       at24@50 {
-                               compatible = "at24,24c256";
-                               reg = <0x50>;
-                       };
+                       #size-cells = <1>;
+                       compatible = "simple-bus";
+                       sleep = <&pmc 0x0c000000>;
+                       ranges;
 
-                       rtc@68 {
-                               compatible = "dallas,ds1339";
-                               reg = <0x68>;
+                       i2c@3000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               cell-index = <0>;
+                               compatible = "fsl-i2c";
+                               reg = <0x3000 0x100>;
+                               interrupts = <14 0x8>;
+                               interrupt-parent = <&ipic>;
+                               dfsrr;
+
+                               dtt@48 {
+                                       compatible = "national,lm75";
+                                       reg = <0x48>;
+                               };
+
+                               at24@50 {
+                                       compatible = "at24,24c256";
+                                       reg = <0x50>;
+                               };
+
+                               rtc@68 {
+                                       compatible = "dallas,ds1339";
+                                       reg = <0x68>;
+                               };
+
+                               mcu_pio: mcu@a {
+                                       #gpio-cells = <2>;
+                                       compatible = "fsl,mc9s08qg8-mpc8379erdb",
+                                                    "fsl,mcu-mpc8349emitx";
+                                       reg = <0x0a>;
+                                       gpio-controller;
+                               };
                        };
 
-                       mcu_pio: mcu@a {
-                               #gpio-cells = <2>;
-                               compatible = "fsl,mc9s08qg8-mpc8379erdb",
-                                            "fsl,mcu-mpc8349emitx";
-                               reg = <0x0a>;
-                               gpio-controller;
+                       sdhci@2e000 {
+                               compatible = "fsl,mpc8379-esdhc";
+                               reg = <0x2e000 0x1000>;
+                               interrupts = <42 0x8>;
+                               interrupt-parent = <&ipic>;
+                               /* Filled in by U-Boot */
+                               clock-frequency = <0>;
                        };
                };
 
                        interrupt-parent = <&ipic>;
                        interrupts = <38 0x8>;
                        phy_type = "ulpi";
+                       sleep = <&pmc 0x00c00000>;
                };
 
                mdio@24520 {
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy2>;
+                       sleep = <&pmc 0xc0000000>;
+                       fsl,magic-packet;
                };
 
                enet1: ethernet@25000 {
                        interrupt-parent = <&ipic>;
                        fixed-link = <1 1 1000 0 0>;
                        tbi-handle = <&tbi1>;
+                       sleep = <&pmc 0x30000000>;
+                       fsl,magic-packet;
                };
 
                serial0: serial@4500 {
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x9fe>;
                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-               };
-
-               sdhci@2e000 {
-                       compatible = "fsl,mpc8379-esdhc";
-                       reg = <0x2e000 0x1000>;
-                       interrupts = <42 0x8>;
-                       interrupt-parent = <&ipic>;
-                       /* Filled in by U-Boot */
-                       clock-frequency = <0>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                sata@18000 {
                        reg = <0x18000 0x1000>;
                        interrupts = <44 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x000000c0>;
                };
 
                sata@19000 {
                        reg = <0x19000 0x1000>;
                        interrupts = <45 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000030>;
                };
 
                sata@1a000 {
                        reg = <0x1a000 0x1000>;
                        interrupts = <46 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x0000000c>;
                };
 
                sata@1b000 {
                        reg = <0x1b000 0x1000>;
                        interrupts = <47 0x8>;
                        interrupt-parent = <&ipic>;
+                       sleep = <&pmc 0x00000003>;
                };
 
                /* IPIC
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                };
+
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
        };
 
        pci0: pci@e0008500 {
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+               sleep = <&pmc 0x00010000>;
                clock-frequency = <66666666>;
                #interrupt-cells = <1>;
                #size-cells = <2>;