]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
Intel FB: support for interlaced video modes
authorKrzysztof Halasa <khc@pm.waw.pl>
Tue, 16 Oct 2007 08:29:18 +0000 (01:29 -0700)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Tue, 16 Oct 2007 16:43:18 +0000 (09:43 -0700)
Intel framebuffer now supports interlaced video modes.

Signed-off-by: Krzysztof Halasa <khc@pm.waw.pl>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/video/intelfb/intelfbhw.c
drivers/video/intelfb/intelfbhw.h

index 6a47682d861446639c5c81bd0db1cc26af3b6036..04d0e0fd9bc0bf9d2607de07ddd167bec509bde5 100644 (file)
@@ -323,11 +323,7 @@ intelfbhw_validate_mode(struct intelfb_info *dinfo,
                return 1;
        }
 
-       /* Check for interlaced/doublescan modes. */
-       if (var->vmode & FB_VMODE_INTERLACED) {
-               WRN_MSG("Mode is interlaced.\n");
-               return 1;
-       }
+       /* Check for doublescan modes. */
        if (var->vmode & FB_VMODE_DOUBLE) {
                WRN_MSG("Mode is double-scan.\n");
                return 1;
@@ -1220,6 +1216,12 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
 
        /* Set the palette to 8-bit mode. */
        *pipe_conf &= ~PIPECONF_GAMMA;
+
+       if (var->vmode & FB_VMODE_INTERLACED)
+               *pipe_conf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
+       else
+               *pipe_conf &= ~PIPECONF_INTERLACE_MASK;
+
        return 0;
 }
 
index 8c54ba8fbdda2e0bd240f00e87d289d17430cbb9..cfcd537494849041af9f789f684e4ea6907db0b5 100644 (file)
 #define PIPECONF_UNLOCKED              0
 #define PIPECONF_GAMMA                 (1 << 24)
 #define PIPECONF_PALETTE               0
+#define PIPECONF_PROGRESSIVE                   (0 << 21)
+#define PIPECONF_INTERLACE_W_FIELD_INDICATION  (6 << 21)
+#define PIPECONF_INTERLACE_FIELD_0_ONLY                (7 << 21)
+#define PIPECONF_INTERLACE_MASK                        (7 << 21)
 
 #define DISPARB                        0x70030
 #define DISPARB_AEND_MASK              0x1ff