]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
tg3: Fix ethtool loopback test for 5761 BX devices
authorMatt Carlson <mcarlson@broadcom.com>
Fri, 2 May 2008 23:48:59 +0000 (16:48 -0700)
committerDavid S. Miller <davem@davemloft.net>
Fri, 2 May 2008 23:48:59 +0000 (16:48 -0700)
A CPMU related loopback test bug existed for AX revisions of the 5761.
While that errata has been fixed, the CPMU still slows down the core
clock too far to run the loopback test successfully.  This patch
disables the CPMU LINK_SPEED mode just like we do with the AX
revisions of the 5761 and all revisions of the 5784.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/tg3.c

index b17812491b8aab02ca63ec7b4e688a3eeb5367dc..bf376b32450e42840d3a22fd815aacf8d2f8668a 100644 (file)
@@ -9570,14 +9570,9 @@ static int tg3_test_loopback(struct tg3 *tp)
 
                /* Turn off link-based power management. */
                cpmuctrl = tr32(TG3_CPMU_CTRL);
-               if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-                   GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX)
-                       tw32(TG3_CPMU_CTRL,
-                            cpmuctrl & ~(CPMU_CTRL_LINK_SPEED_MODE |
-                                         CPMU_CTRL_LINK_AWARE_MODE));
-               else
-                       tw32(TG3_CPMU_CTRL,
-                            cpmuctrl & ~CPMU_CTRL_LINK_AWARE_MODE);
+               tw32(TG3_CPMU_CTRL,
+                    cpmuctrl & ~(CPMU_CTRL_LINK_SPEED_MODE |
+                                 CPMU_CTRL_LINK_AWARE_MODE));
        }
 
        if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK))