OMAP2xxx clock: consolidate DELAYED_APP clock commits; fix barrier

Consolidate the commit code for DELAYED_APP clocks into a subroutine,
_omap2xxx_clk_commit().  Also convert the MPU barrier wmb() into an
OCP barrier, since with an MPU barrier, we have no guarantee that the
write actually reached the endpoint device.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d0caeef5aa72ad9b9c41bde454252a9cd839a4ff..78e14bf05e013e5036a3e4e513649f3c3b9e8c2b 100644 (file)
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -120,6 +120,28 @@ static void _omap2_clk_write_reg(u32 v, u16 reg_offset, struct clk *clk)
                cm_write_mod_reg(v, clk->prcm_mod, reg_offset);
 }
 
+/**
+ * _omap2xxx_clk_commit - commit clock parent/rate changes in hardware
+ * @clk: struct clk *
+ *
+ * If @clk has the DELAYED_APP flag set, meaning that parent/rate changes
+ * don't take effect until the VALID_CONFIG bit is written, write the
+ * VALID_CONFIG bit and wait for the write to complete.  No return value.
+ */
+static void _omap2xxx_clk_commit(struct clk *clk)
+{
+       if (!cpu_is_omap24xx())
+               return;
+
+       if (!(clk->flags & DELAYED_APP))
+               return;
+
+       prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD,
+                         OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
+       /* OCP barrier */
+       prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
+}
+
 /*
  * _dpll_test_fint - test whether an Fint value is valid for the DPLL
  * @clk: DPLL struct clk to test
@@ -757,11 +779,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
 
        clk->rate = clk->parent->rate / new_div;
 
-       if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) {
-               prm_write_mod_reg(OMAP24XX_VALID_CONFIG,
-                       OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
-               wmb();
-       }
+       _omap2xxx_clk_commit(clk);
 
        return 0;
 }
@@ -835,11 +853,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
        _omap2_clk_write_reg(v, clk->clksel_reg, clk);
        wmb();
 
-       if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) {
-               prm_write_mod_reg(OMAP24XX_VALID_CONFIG,
-                       OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
-               wmb();
-       }
+       _omap2xxx_clk_commit(clk);
 
        if (clk->usecount > 0)
                _omap2_clk_enable(clk);