]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
PCI/MSI: bugfix/utilize for msi_capability_init()
authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Wed, 24 Dec 2008 08:27:04 +0000 (17:27 +0900)
committerJesse Barnes <jbarnes@virtuousgeek.org>
Fri, 16 Jan 2009 20:35:25 +0000 (12:35 -0800)
This patch fix a following bug and does a cleanup.

bug:
commit 5993760f7fc75b77e4701f1e56dc84c0d6cf18d5
had a wrong change (since is_64 is boolean[0|1]):

-               pci_write_config_dword(dev,
-                       msi_mask_bits_reg(pos, is_64bit_address(control)),
-                       maskbits);
+               pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits);

utilize:
Unify separated if (entry->msi_attrib.maskbit) statements.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Acked-by: "Jike Song" <albcamus@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
drivers/pci/msi.c

index b4a90badd0a6d66c57c83961f8bc956a49aa7d7a..896a15d70f5b3060a587b52ca2ecbb9dbaadcd9e 100644 (file)
@@ -398,21 +398,19 @@ static int msi_capability_init(struct pci_dev *dev)
        entry->msi_attrib.masked = 1;
        entry->msi_attrib.default_irq = dev->irq;       /* Save IOAPIC IRQ */
        entry->msi_attrib.pos = pos;
-       if (entry->msi_attrib.maskbit) {
-               entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
-                               entry->msi_attrib.is_64);
-       }
        entry->dev = dev;
        if (entry->msi_attrib.maskbit) {
-               unsigned int maskbits, temp;
+               unsigned int base, maskbits, temp;
+
+               base = msi_mask_bits_reg(pos, entry->msi_attrib.is_64);
+               entry->mask_base = (void __iomem *)(long)base;
+
                /* All MSIs are unmasked by default, Mask them all */
-               pci_read_config_dword(dev,
-                       msi_mask_bits_reg(pos, entry->msi_attrib.is_64),
-                       &maskbits);
+               pci_read_config_dword(dev, base, &maskbits);
                temp = (1 << multi_msi_capable(control));
                temp = ((temp - 1) & ~temp);
                maskbits |= temp;
-               pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits);
+               pci_write_config_dword(dev, base, maskbits);
                entry->msi_attrib.maskbits_mask = temp;
        }
        list_add_tail(&entry->list, &dev->msi_list);