[POWERPC] 4xx: Add PCI entry to 440GRx Rainier DTS.

This adds PCI entry to PowerPC 440GRx Rainier DTS.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts
index 63d996e647c814d93417f82cf3b9113b80405837..d0e9e16aba6328f7d7b3709cbf45e6c11cb9f4fc 100644 (file)
--- a/arch/powerpc/boot/dts/rainier.dts
+++ b/arch/powerpc/boot/dts/rainier.dts
@@ -308,6 +308,33 @@
                                has-new-stacr-staopc;
                        };
                };
+
+               PCI0: pci@1ec000000 {
+                       device_type = "pci";
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
+                       primary;
+                       reg = <1 eec00000 8     /* Config space access */
+                              1 eed00000 4     /* IACK */
+                              1 eed00000 4     /* Special cycle */
+                              1 ef400000 40>;  /* Internal registers */
+
+                       /* Outbound ranges, one memory and one IO,
+                        * later cannot be changed. Chip supports a second
+                        * IO range but we don't use it for now
+                        */
+                       ranges = <02000000 0 80000000 1 80000000 0 10000000
+                               01000000 0 00000000 1 e8000000 0 00100000>;
+
+                       /* Inbound 2GB range starting at 0 */
+                       dma-ranges = <42000000 0 0 0 0 0 80000000>;
+
+                       /* All PCI interrupts are routed to IRQ 67 */
+                       interrupt-map-mask = <0000 0 0 0>;
+                       interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
+               };
        };
 
        chosen {