return 0;
}
-static int icside_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- return -1;
-}
-
static int icside_dma_end(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
hwif->set_dma_mode = icside_set_dma_mode;
hwif->autodma = 1;
- hwif->ide_dma_check = icside_dma_check;
hwif->dma_host_off = icside_dma_host_off;
hwif->dma_off_quietly = icside_dma_off_quietly;
hwif->dma_host_on = icside_dma_host_on;
return (unsigned char)cris_ide_inw(reg);
}
-static int cris_dma_check (ide_drive_t *drive);
static int cris_dma_end (ide_drive_t *drive);
static int cris_dma_setup (ide_drive_t *drive);
static void cris_dma_exec_cmd (ide_drive_t *drive, u8 command);
hwif->ata_output_data = &cris_ide_output_data;
hwif->atapi_input_bytes = &cris_atapi_input_bytes;
hwif->atapi_output_bytes = &cris_atapi_output_bytes;
- hwif->ide_dma_check = &cris_dma_check;
hwif->ide_dma_end = &cris_dma_end;
hwif->dma_setup = &cris_dma_setup;
hwif->dma_exec_cmd = &cris_dma_exec_cmd;
* the caller should revert to PIO for the current request.
*/
-static int cris_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static int cris_dma_end(ide_drive_t *drive)
{
drive->waiting_for_dma = 0;
ide_hwif_t *hwif = drive->hwif;
struct hd_driveid *id = drive->id;
- /* consult the list of known "bad" drives */
- if (__ide_dma_bad_drive(drive))
- return -1;
-
if (drive->media != ide_disk && hwif->atapi_dma == 0)
- return -1;
+ return 0;
- if ((id->capability & 1) && drive->autodma) {
- /*
- * Enable DMA on any drive that has
- * UltraDMA (mode 0/1/2/3/4/5/6) enabled
- */
- if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
- return 0;
- /*
- * Enable DMA on any drive that has mode2 DMA
- * (multi or single) enabled
- */
- if (id->field_valid & 2) /* regular DMA */
- if ((id->dma_mword & 0x404) == 0x404 ||
- (id->dma_1word & 0x404) == 0x404)
- return 0;
-
- /* Consult the list of known "good" drives */
- if (ide_dma_good_drive(drive))
- return 0;
- }
+ /*
+ * Enable DMA on any drive that has
+ * UltraDMA (mode 0/1/2/3/4/5/6) enabled
+ */
+ if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
+ return 1;
+
+ /*
+ * Enable DMA on any drive that has mode2 DMA
+ * (multi or single) enabled
+ */
+ if (id->field_valid & 2) /* regular DMA */
+ if ((id->dma_mword & 0x404) == 0x404 ||
+ (id->dma_1word & 0x404) == 0x404)
+ return 1;
- return -1;
+ /* Consult the list of known "good" drives */
+ if (ide_dma_good_drive(drive))
+ return 1;
+
+ return 0;
}
/**
drive->name, __FUNCTION__);
return 0;
}
+#else
+static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
int __ide_dma_bad_drive (ide_drive_t *drive)
EXPORT_SYMBOL_GPL(ide_find_dma_mode);
-int ide_tune_dma(ide_drive_t *drive)
+static int ide_tune_dma(ide_drive_t *drive)
{
u8 speed;
if (__ide_dma_bad_drive(drive))
return 0;
+ if (drive->hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
+ return config_drive_for_dma(drive);
+
speed = ide_max_dma_mode(drive);
if (!speed)
EXPORT_SYMBOL_GPL(ide_tune_dma);
+static int ide_dma_check(ide_drive_t *drive)
+{
+ ide_hwif_t *hwif = drive->hwif;
+ int vdma = (hwif->host_flags & IDE_HFLAG_VDMA)? 1 : 0;
+
+ if (!vdma && ide_tune_dma(drive))
+ return 0;
+
+ /* TODO: always do PIO fallback */
+ if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
+ return -1;
+
+ ide_set_max_pio(drive);
+
+ return vdma ? 0 : -1;
+}
+
void ide_dma_verbose(ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
ide_hwif_t *hwif = drive->hwif;
int rc;
- rc = hwif->ide_dma_check(drive);
+ rc = ide_dma_check(drive);
switch(rc) {
case -1: /* DMA needs to be disabled */
hwif->ide_dma_on = &__ide_dma_on;
if (!hwif->dma_host_on)
hwif->dma_host_on = &ide_dma_host_on;
- if (!hwif->ide_dma_check)
- hwif->ide_dma_check = &config_drive_for_dma;
if (!hwif->dma_setup)
hwif->dma_setup = &ide_dma_setup;
if (!hwif->dma_exec_cmd)
case ide_pm_restore_dma: /* Resume step 3 (restore DMA) */
/*
- * Right now, all we do is call hwif->ide_dma_check(drive),
+ * Right now, all we do is call ide_set_dma(drive),
* we could be smarter and check for current xfer_speed
* in struct drive etc...
*/
- if (drive->hwif->ide_dma_check == NULL)
+ if (drive->hwif->ide_dma_on == NULL)
break;
drive->hwif->dma_off_quietly(drive);
/*
// msleep(50);
#ifdef CONFIG_BLK_DEV_IDEDMA
- if (hwif->ide_dma_check) /* check if host supports DMA */
+ if (hwif->ide_dma_on) /* check if host supports DMA */
hwif->dma_host_off(drive);
#endif
#ifdef CONFIG_BLK_DEV_IDEDMA
if (speed >= XFER_SW_DMA_0)
hwif->dma_host_on(drive);
- else if (hwif->ide_dma_check) /* check if host supports DMA */
+ else if (hwif->ide_dma_on) /* check if host supports DMA */
hwif->dma_off_quietly(drive);
#endif
* Move here to prevent module loading clashing.
*/
// drive->autodma = hwif->autodma;
- if (hwif->ide_dma_check) {
+ if (hwif->ide_dma_on) {
/*
* Force DMAing for the beginning of the check.
* Some chipsets appear to do interesting
hwif->dma_exec_cmd = tmp_hwif->dma_exec_cmd;
hwif->dma_start = tmp_hwif->dma_start;
hwif->ide_dma_end = tmp_hwif->ide_dma_end;
- hwif->ide_dma_check = tmp_hwif->ide_dma_check;
hwif->ide_dma_on = tmp_hwif->ide_dma_on;
hwif->dma_off_quietly = tmp_hwif->dma_off_quietly;
hwif->ide_dma_test_irq = tmp_hwif->ide_dma_test_irq;
if (!drive->id || !(drive->id->capability & 1))
goto out;
- if (hwif->ide_dma_check == NULL)
+ if (hwif->ide_dma_on == NULL)
goto out;
err = -EBUSY;
return drive->hwif->mwdma_mask;
}
-static int auide_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static int auide_dma_test_irq(ide_drive_t *drive)
{
if (drive->waiting_for_dma == 0)
hwif->mdma_filter = &auide_mdma_filter;
- hwif->ide_dma_check = &auide_dma_check;
hwif->dma_exec_cmd = &auide_dma_exec_cmd;
hwif->dma_start = &auide_dma_start;
hwif->ide_dma_end = &auide_dma_end;
drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0);
}
-static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static void aec62xx_dma_lost_irq (ide_drive_t *drive)
{
switch (HWIF(drive)->pci_dev->device) {
hwif->ultra_mask = hwif->cds->udma_mask;
hwif->mwdma_mask = 0x07;
- hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate;
hwif->dma_lost_irq = &aec62xx_dma_lost_irq;
if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
}
}
-/**
- * ali15x3_config_drive_for_dma - configure for DMA
- * @drive: drive to configure
- *
- * Configure a drive for DMA operation. If DMA is not possible we
- * drop the drive into PIO mode instead.
- */
-
-static int ali15x3_config_drive_for_dma(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* ali15x3_dma_setup - begin a DMA phase
* @drive: target device
hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07;
- hwif->ide_dma_check = &ali15x3_config_drive_for_dma;
hwif->dma_setup = &ali15x3_dma_setup;
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
amd_set_drive(drive, XFER_PIO_0 + pio);
}
-static int amd74xx_ide_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/*
* The initialization callback. Here we determine the IDE chip type
* and initialize its drive independent registers.
hwif->cbl = ATA_CBL_PATA40;
}
- hwif->ide_dma_check = &amd74xx_ide_dma_check;
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
spin_unlock_irqrestore(&atiixp_lock, flags);
}
-/**
- * atiixp_dma_check - set up an IDE device
- * @drive: IDE drive to configure
- *
- * Set up the ATIIXP interface for the best available speed on this
- * interface, preferring DMA to PIO.
- */
-
-static int atiixp_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* init_hwif_atiixp - fill in the hwif for the ATIIXP
* @hwif: IDE interface
hwif->dma_host_on = &atiixp_dma_host_on;
hwif->dma_host_off = &atiixp_dma_host_off;
- hwif->ide_dma_check = &atiixp_dma_check;
+
if (!noautodma)
hwif->autodma = 1;
(void) pci_write_config_byte(dev, pciU, regU);
}
-static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static int cmd648_ide_dma_end (ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5)
hwif->ultra_mask = 0x00;
- hwif->ide_dma_check = &cmd64x_config_drive_for_dma;
-
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = ata66_cmd64x(hwif);
cs5520_set_pio_mode(drive, 0);
}
-static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
-{
- /* Tune the drive for PIO modes up to PIO 4 */
- ide_set_max_pio(drive);
-
- /* Then tell the core to use DMA operations */
- return 0;
-}
-
/*
* We provide a callback for our nonstandard DMA location
*/
return;
}
- hwif->ide_dma_check = &cs5520_config_drive_xfer_rate;
hwif->ide_dma_on = &cs5520_dma_on;
/* ATAPI is harder so leave it for now */
.init_hwif = init_hwif_cs5520, \
.autodma = AUTODMA, \
.bootable = ON_BOARD, \
- .host_flags = IDE_HFLAG_ISA_PORTS, \
+ .host_flags = IDE_HFLAG_ISA_PORTS | \
+ IDE_HFLAG_VDMA, \
.pio_mask = ATA_PIO4, \
}
return mask;
}
-/**
- * cs5530_config_dma - set DMA/UDMA mode
- * @drive: drive to tune
- *
- * cs5530_config_dma() handles setting of DMA/UDMA mode
- * for both the chipset and drive.
- */
-
-static int cs5530_config_dma(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
{
unsigned long basereg;
hwif->mwdma_mask = 0x07;
hwif->udma_filter = cs5530_udma_filter;
- hwif->ide_dma_check = &cs5530_config_dma;
+
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
cs5535_set_speed(drive, XFER_PIO_0 + pio);
}
-static int cs5535_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static u8 __devinit cs5535_cable_detect(struct pci_dev *dev)
{
u8 bit;
if (hwif->dma_base == 0)
return;
- hwif->ide_dma_check = &cs5535_dma_check;
-
hwif->atapi_dma = 1;
hwif->ultra_mask = 0x1F;
hwif->mwdma_mask = 0x07;
.init_hwif = init_hwif_cy82c693,
.autodma = AUTODMA,
.bootable = ON_BOARD,
- .host_flags = IDE_HFLAG_SINGLE,
+ .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA,
.pio_mask = ATA_PIO4,
};
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 1 */
.name = "NS87410",
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 2 */
.name = "SAMURAI",
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 3 */
.name = "HT6565",
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 4 */
.name = "UM8673F",
.init_hwif = init_hwif_generic,
.autodma = NODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 5 */
.name = "UM8886A",
.init_hwif = init_hwif_generic,
.autodma = NODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 6 */
.name = "UM8886BF",
.init_hwif = init_hwif_generic,
.autodma = NODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 7 */
.name = "HINT_IDE",
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 8 */
.name = "VIA_IDE",
.init_hwif = init_hwif_generic,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 9 */
.name = "OPTI621V",
.init_hwif = init_hwif_generic,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 10 */
.name = "VIA8237SATA",
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 11 */
.name = "Piccolo0102",
.init_hwif = init_hwif_generic,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 12 */
.name = "Piccolo0103",
.init_hwif = init_hwif_generic,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 13 */
.name = "Piccolo0105",
.init_hwif = init_hwif_generic,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 14 */
.name = "Revolution",
.init_hwif = init_hwif_generic,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
}
};
hpt34x_set_mode(drive, XFER_PIO_0 + pio);
}
-static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return -1;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/*
* If the BIOS does not set the IO base addaress to XX00, 343 will fail.
*/
hwif->swdma_mask = 0x07;
#endif
- hwif->ide_dma_check = &hpt34x_config_drive_xfer_rate;
if (!noautodma)
hwif->autodma = (pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0;
hwif->drives[0].autodma = hwif->autodma;
IDE_CONTROL_REG);
}
-static int hpt366_config_drive_xfer_rate(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/*
* This is specific to the HPT366 UDMA chipset
* by HighPoint|Triones Technologies, Inc.
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
- hwif->ide_dma_check = &hpt366_config_drive_xfer_rate;
-
if (chip_type >= HPT374) {
hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
hwif->ide_dma_end = &hpt374_ide_dma_end;
it8213_set_pio_mode(drive, pio);
}
-/**
- * it8213_configure_drive_for_dma - set up for DMA transfers
- * @drive: drive we are going to set up
- *
- * Set up the drive for DMA, tune the controller and drive as
- * required. If the drive isn't suitable for DMA or we hit
- * other problems then we will drop down to PIO and set up
- * PIO appropriately
- */
-
-static int it8213_config_drive_for_dma (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* init_hwif_it8213 - set up hwif structs
* @hwif: interface to set up
*
- * We do the basic set up of the interface structure. The IT8212
- * requires several custom handlers so we override the default
- * ide DMA handlers appropriately
+ * We do the basic set up of the interface structure.
*/
static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
pci_read_config_byte(hwif->pci_dev, 0x42, ®42h);
- hwif->ide_dma_check = &it8213_config_drive_for_dma;
-
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
it821x_tune_mwdma(drive, speed - XFER_MW_DMA_0);
}
-/**
- * it821x_configure_drive_for_dma - set up for DMA transfers
- * @drive: drive we are going to set up
- *
- * Set up the drive for DMA, tune the controller and drive as
- * required. If the drive isn't suitable for DMA or we hit
- * other problems then we will drop down to PIO and set up
- * PIO appropriately
- */
-
-static int it821x_config_drive_for_dma (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* ata66_it821x - check for 80 pin cable
* @hwif: interface to check
hwif->ultra_mask = 0x7f;
hwif->mwdma_mask = 0x07;
- hwif->ide_dma_check = &it821x_config_drive_for_dma;
-
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = ata66_it821x(hwif);
{
}
-/**
- * jmicron_configure_drive_for_dma - set up for DMA transfers
- * @drive: drive we are going to set up
- *
- * As the JMicron snoops for timings all we actually need to do is
- * make sure we don't set an invalid mode.
- */
-
-static int jmicron_config_drive_for_dma (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* init_hwif_jmicron - set up hwif structs
* @hwif: interface to set up
hwif->ultra_mask = 0x7f;
hwif->mwdma_mask = 0x07;
- hwif->ide_dma_check = &jmicron_config_drive_for_dma;
-
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = ata66_jmicron(hwif);
.init_hwif = init_hwif_ns87415,
.autodma = AUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
};
static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.bootable = ON_BOARD,
.pio_mask = ATA_PIO3,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
},{ /* 1 */
.name = "OPTI621X",
.init_hwif = init_hwif_opti621,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.bootable = ON_BOARD,
.pio_mask = ATA_PIO3,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
}
};
return ATA_CBL_PATA80;
}
-static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static int pdcnew_quirkproc(ide_drive_t *drive)
{
const char **list, *model = drive->id->model;
hwif->ultra_mask = hwif->cds->udma_mask;
hwif->mwdma_mask = 0x07;
- hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
-
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = pdcnew_cable_detect(hwif);
outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
}
-static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static int pdc202xx_quirkproc (ide_drive_t *drive)
{
const char **list, *model = drive->id->model;
hwif->swdma_mask = 0x07;
hwif->atapi_dma = 1;
- hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;
hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
hwif->dma_timeout = &pdc202xx_dma_timeout;
piix_set_pio_mode(drive, pio);
}
-/**
- * piix_config_drive_xfer_rate - set up an IDE device
- * @drive: IDE drive to configure
- *
- * Set up the PIIX interface for the best available speed on this
- * interface, preferring DMA to PIO.
- */
-
-static int piix_config_drive_xfer_rate (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* piix_is_ichx - check if ICHx
* @dev: PCI device to check
if (no_piix_dma)
hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
- hwif->ide_dma_check = &piix_config_drive_xfer_rate;
if (!noautodma)
hwif->autodma = 1;
}
}
-/*
- * sc1200_config_dma() handles selection/setting of DMA/UDMA modes
- * for both the chipset and drive.
- */
-static int sc1200_config_dma (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
-
/* Replacement for the standard ide_dma_end action in
* dma_proc.
*
return;
hwif->udma_filter = sc1200_udma_filter;
- hwif->ide_dma_check = &sc1200_config_dma;
hwif->ide_dma_end = &sc1200_ide_dma_end;
if (!noautodma)
out_be32((void __iomem *)udenvt_port, reg);
}
-/**
- * scc_configure_drive_for_dma - set up for DMA transfers
- * @drive: drive we are going to set up
- *
- * Set up the drive for DMA, tune the controller and drive as
- * required.
- * If the drive isn't suitable for DMA or we hit other problems
- * then we will drop down to PIO and set up PIO appropriately.
- * (return -1)
- */
-
-static int scc_config_drive_for_dma(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/**
* scc_ide_dma_setup - begin a DMA phase
* @drive: target device
hwif->ide_dma_end = scc_ide_dma_end;
hwif->set_pio_mode = scc_set_pio_mode;
hwif->set_dma_mode = scc_set_dma_mode;
- hwif->ide_dma_check = scc_config_drive_for_dma;
hwif->ide_dma_test_irq = scc_dma_test_irq;
hwif->udma_filter = scc_udma_filter;
pci_write_config_byte(dev, 0x54, ultra_enable);
}
-static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name)
{
unsigned int reg;
if (!hwif->dma_base)
return;
- hwif->ide_dma_check = &svwks_config_drive_xfer_rate;
if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = ata66_svwks(hwif);
{
}
-static int sgiioc4_ide_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- /*
- * ->set_pio_mode is not implemented currently
- * so this is just for the completness
- */
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/* returns 1 if dma irq issued, 0 otherwise */
static int
sgiioc4_ide_dma_test_irq(ide_drive_t * drive)
hwif->dma_setup = &sgiioc4_ide_dma_setup;
hwif->dma_start = &sgiioc4_ide_dma_start;
hwif->ide_dma_end = &sgiioc4_ide_dma_end;
- hwif->ide_dma_check = &sgiioc4_ide_dma_check;
hwif->ide_dma_on = &sgiioc4_ide_dma_on;
hwif->dma_off_quietly = &sgiioc4_dma_off_quietly;
hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq;
}
}
-/**
- * siimage_configure_drive_for_dma - set up for DMA transfers
- * @drive: drive we are going to set up
- *
- * Set up the drive for DMA, tune the controller and drive as
- * required. If the drive isn't suitable for DMA or we hit
- * other problems then we will drop down to PIO and set up
- * PIO appropriately
- */
-
-static int siimage_config_drive_for_dma (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/* returns 1 if dma irq issued, 0 otherwise */
static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
{
if (!is_sata(hwif))
hwif->atapi_dma = 1;
- hwif->ide_dma_check = &siimage_config_drive_for_dma;
-
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = ata66_siimage(hwif);
}
}
-static int sis5513_config_xfer_rate(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static u8 sis5513_ata133_udma_filter(ide_drive_t *drive)
{
struct pci_dev *dev = drive->hwif->pci_dev;
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = ata66_sis5513(hwif);
- hwif->ide_dma_check = &sis5513_config_xfer_rate;
-
if (!noautodma)
hwif->autodma = 1;
}
}
-/*
- * Check to see if the drive and chipset are capable of DMA mode.
- */
-static int sl82c105_ide_dma_check(ide_drive_t *drive)
-{
- DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name));
-
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/*
* The SL82C105 holds off all IDE interrupts while in DMA mode until
* all DMA activity is completed. Sometimes this causes problems (eg,
hwif->atapi_dma = 1;
hwif->mwdma_mask = 0x07;
- hwif->ide_dma_check = &sl82c105_ide_dma_check;
hwif->ide_dma_on = &sl82c105_ide_dma_on;
hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
hwif->dma_lost_irq = &sl82c105_dma_lost_irq;
slc90e66_set_pio_mode(drive, pio);
}
-static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
{
u8 reg47 = 0;
/* bit[0(1)]: 0:80, 1:40 */
hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
- hwif->ide_dma_check = &slc90e66_config_drive_xfer_rate;
-
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
return 0;
}
-static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
{
unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5);
hwif->ultra_mask = 0x1f;
hwif->mwdma_mask = 0x07;
- hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate;
hwif->dma_start = &tc86c001_dma_start;
if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
triflex_set_mode(drive, XFER_PIO_0 + pio);
}
-static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
{
hwif->set_pio_mode = &triflex_set_pio_mode;
hwif->atapi_dma = 1;
hwif->mwdma_mask = 0x07;
hwif->swdma_mask = 0x07;
- hwif->ide_dma_check = &triflex_config_drive_xfer_rate;
if (!noautodma)
hwif->autodma = 1;
.init_hwif = init_hwif_trm290,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
+ .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
};
static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_device_id *id)
via_set_drive(drive, XFER_PIO_0 + pio);
}
-/**
- * via82cxxx_ide_dma_check - set up for DMA if possible
- * @drive: IDE drive to set up
- *
- * Set up the drive for the highest supported speed considering the
- * driver, controller and cable
- */
-
-static int via82cxxx_ide_dma_check (ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
{
struct via_isa_bridge *via_config;
if (hwif->cbl != ATA_CBL_PATA40_SHORT)
hwif->cbl = via82cxxx_cable_detect(hwif);
- hwif->ide_dma_check = &via82cxxx_ide_dma_check;
if (!noautodma)
hwif->autodma = 1;
hwif->drives[0].autodma = hwif->autodma;
}
}
-/*
- * Check what is the best DMA timing setting for the drive and
- * call appropriate functions to apply it.
- */
-static int
-pmac_ide_dma_check(ide_drive_t *drive)
-{
- if (ide_tune_dma(drive))
- return 0;
-
- ide_set_max_pio(drive);
-
- return -1;
-}
-
/*
* Prepare a DMA transfer. We build the DMA table, adjust the timings for
* a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
hwif->dma_off_quietly = &ide_dma_off_quietly;
hwif->ide_dma_on = &__ide_dma_on;
- hwif->ide_dma_check = &pmac_ide_dma_check;
hwif->dma_setup = &pmac_ide_dma_setup;
hwif->dma_exec_cmd = &pmac_ide_dma_exec_cmd;
hwif->dma_start = &pmac_ide_dma_start;
void (*dma_exec_cmd)(ide_drive_t *, u8);
void (*dma_start)(ide_drive_t *);
int (*ide_dma_end)(ide_drive_t *drive);
- int (*ide_dma_check)(ide_drive_t *drive);
int (*ide_dma_on)(ide_drive_t *drive);
void (*dma_off_quietly)(ide_drive_t *drive);
int (*ide_dma_test_irq)(ide_drive_t *drive);
IDE_HFLAG_POST_SET_MODE = (1 << 8),
/* don't program host/device for the transfer mode ("smart" hosts) */
IDE_HFLAG_NO_SET_MODE = (1 << 9),
+ /* trust BIOS for programming chipset/device for DMA */
+ IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
+ /* host uses VDMA */
+ IDE_HFLAG_VDMA = (1 << 11),
};
typedef struct ide_pci_device_s {
return ide_find_dma_mode(drive, XFER_UDMA_6);
}
-int ide_tune_dma(ide_drive_t *);
void ide_dma_off(ide_drive_t *);
void ide_dma_verbose(ide_drive_t *);
int ide_set_dma(ide_drive_t *);
#else
static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
-static inline int ide_tune_dma(ide_drive_t *drive) { return 0; }
static inline void ide_dma_off(ide_drive_t *drive) { ; }
static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
projects / linux-2.6-omap-h63xx.git / commitdiff