]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
sl82c105: remove no longer needed ->selectproc method
authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Sat, 26 Jan 2008 19:12:59 +0000 (20:12 +0100)
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Sat, 26 Jan 2008 19:12:59 +0000 (20:12 +0100)
* Program register 0x40 in sl82c105_resetproc().

* Remove no longer needed sl82c105_selectproc() and pci_set_drvdata() calls.

Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
drivers/ide/pci/sl82c105.c

index a85413467f93c5352e6a215f735eac51b175fc7c..c7a125b66c297504bea97c933b0f1b50044a9a46 100644 (file)
@@ -218,36 +218,9 @@ static int sl82c105_dma_end(ide_drive_t *drive)
        return ret;
 }
 
-/*
- * Ok, that is nasty, but we must make sure the DMA timings
- * won't be used for a PIO access. The solution here is
- * to make sure the 16 bits mode is diabled on the channel
- * when DMA is enabled, thus causing the chip to use PIO0
- * timings for those operations.
- */
-static void sl82c105_selectproc(ide_drive_t *drive)
-{
-       ide_hwif_t *hwif        = HWIF(drive);
-       struct pci_dev *dev     = hwif->pci_dev;
-       u32 val, old, mask;
-
-       //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
-
-       mask = hwif->channel ? CTRL_P1F16 : CTRL_P0F16;
-       old = val = (u32)pci_get_drvdata(dev);
-       if (drive->using_dma)
-               val &= ~mask;
-       else
-               val |= mask;
-       if (old != val) {
-               pci_write_config_dword(dev, 0x40, val); 
-               pci_set_drvdata(dev, (void *)val);
-       }
-}
-
 /*
  * ATA reset will clear the 16 bits mode in the control
- * register, we need to update our cache
+ * register, we need to reprogram it
  */
 static void sl82c105_resetproc(ide_drive_t *drive)
 {
@@ -257,7 +230,8 @@ static void sl82c105_resetproc(ide_drive_t *drive)
        DBG(("sl82c105_resetproc(drive:%s)\n", drive->name));
 
        pci_read_config_dword(dev, 0x40, &val);
-       pci_set_drvdata(dev, (void *)val);
+       val |= (CTRL_P1F16 | CTRL_P0F16);
+       pci_write_config_dword(dev, 0x40, val);
 }
 
 /*
@@ -310,7 +284,6 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
        pci_read_config_dword(dev, 0x40, &val);
        val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
        pci_write_config_dword(dev, 0x40, val);
-       pci_set_drvdata(dev, (void *)val);
 
        return dev->irq;
 }
@@ -326,7 +299,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
 
        hwif->set_pio_mode      = &sl82c105_set_pio_mode;
        hwif->set_dma_mode      = &sl82c105_set_dma_mode;
-       hwif->selectproc        = &sl82c105_selectproc;
        hwif->resetproc         = &sl82c105_resetproc;
 
        if (!hwif->dma_base)