ARM: OMAP: Add omap3430 support

ARM: OMAP: Add omap3430 support

Signed-off-by: Syed Mohammed Khasim <x0khasim@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index f463f6c78b8cf3ada5b9201636099d71e7f77113..2f1621b12d3ec5c25cd220286d4630a2248d5250 100644 (file)
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -5,6 +5,10 @@ config ARCH_OMAP24XX
        bool "OMAP24xx Based System"
        depends on ARCH_OMAP2
 
+config ARCH_OMAP34XX
+       bool "OMAP34xx Based System"
+       depends on ARCH_OMAP3
+
 config ARCH_OMAP2420
        bool "OMAP2420 support"
        depends on ARCH_OMAP24XX
@@ -15,8 +19,12 @@ config ARCH_OMAP2430
        bool "OMAP2430 support"
        depends on ARCH_OMAP24XX
 
+config ARCH_OMAP3430
+       bool "OMAP3430 support"
+       depends on ARCH_OMAP3 && ARCH_OMAP34XX
+
 comment "OMAP Board Type"
-       depends on ARCH_OMAP2
+       depends on ARCH_OMAP2 || ARCH_OMAP3
 
 config MACH_OMAP_GENERIC
        bool "Generic OMAP board"
@@ -37,6 +45,10 @@ config MACH_OMAP_H4
        select OMAP_DEBUG_DEVICES
        select GPIOEXPANDER_OMAP
 
+
+config MACH_OMAP_3430SDP
+       bool "OMAP 3430 SDP board"
+       depends on ARCH_OMAP3 && ARCH_OMAP34XX
 config MACH_OMAP_H4_TUSB
        bool "TUSB 6010 EVM board"
        depends on MACH_OMAP_H4

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 9c1309c4b0a18c1ad77ae91caad9a5e2191b2b2e..cc0fae2a38df24e13644b6cd0bb706b983b87816 100644 (file)
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_MACH_OMAP_H4)            += board-h4.o
 obj-$(CONFIG_MACH_OMAP_2430SDP)                += board-2430sdp.o \
                                           board-2430sdp-flash.o \
                                           board-2430sdp-usb.o
+obj-$(CONFIG_MACH_OMAP_3430SDP)                += board-3430sdp.o
 obj-$(CONFIG_MACH_OMAP_APOLLON)                += board-apollon.o \
                                           board-apollon-keys.o
 obj-$(CONFIG_MACH_NOKIA_N800)          += board-n800.o board-n800-flash.o \

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 135ace550bc3254a333338f41ea7a16feb78cc6b..5dca6d431a30f4ab10b5d423ecc5a90cb9f90c14 100644 (file)
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -22,12 +22,10 @@
 
 #undef DEBUG
 
-#ifdef CONFIG_ARCH_OMAP2420
+#if defined(CONFIG_ARCH_OMAP2420)
 #define GPMC_BASE              0x6800a000
-#endif
-
-#ifdef CONFIG_ARCH_OMAP2430
-#define GPMC_BASE              0x6E000000
+#elif defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
+#define GPMC_BASE              0x6e000000
 #endif
 
 #define GPMC_REVISION          0x00

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 4dfd878d796841e43cd8e16cad6bb793aeabeb4c..143592391c95807bb3b228ffe5c2b6f181f3f116 100644 (file)
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -18,11 +18,11 @@
 #include <asm/io.h>
 
 #if defined(CONFIG_ARCH_OMAP2420)
-#define OMAP24XX_TAP_BASE      io_p2v(0x48014000)
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2430)
-#define OMAP24XX_TAP_BASE      io_p2v(0x4900A000)
+#define TAP_BASE       io_p2v(0x48014000)
+#elif defined(CONFIG_ARCH_OMAP2430)
+#define TAP_BASE       io_p2v(0x4900A000)
+#elif defined(CONFIG_ARCH_OMAP34XX)
+#define TAP_BASE       io_p2v(0x54004000)
 #endif
 
 #define OMAP_TAP_IDCODE                0x0204
@@ -58,7 +58,7 @@ static struct omap_id omap_ids[] __initdata = {
 
 static u32 __init read_tap_reg(int reg)
 {
-       return __raw_readl(OMAP24XX_TAP_BASE + reg);
+       return __raw_readl(TAP_BASE + reg);
 }
 
 void __init omap2_check_revision(void)
@@ -118,9 +118,16 @@ void __init omap2_check_revision(void)
 
        system_rev |= rev << 8;
 
-       /* Add the cpu class info (24xx) */
-       system_rev |= 0x24;
+       /* REVISIT:
+        * OMAP 3430 ES 1.0 does't populate IDCODE registers
+        * Following lines have to be revisited for next version
+        */
 
+#ifndef CONFIG_ARCH_OMAP3
+       system_rev |= 0x24;
+#else
+       system_rev |= 0x34;
+#endif
        pr_info("OMAP%04x", system_rev >> 16);
        if ((system_rev >> 8) & 0x0f)
                printk("%x", (system_rev >> 8) & 0x0f);

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 26f2b58740aa31a6102e1403bf11fb00a9a13043..82375295ee82bc6ed997297d43059e200a88bbff 100644 (file)
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -17,7 +17,6 @@
 #include <asm/mach/irq.h>
 #include <asm/irq.h>
 #include <asm/io.h>
-#include <asm/arch/cpu.h>
 
 #define INTC_REVISION  0x0000
 #define INTC_SYSCONFIG 0x0010
@@ -117,10 +116,12 @@ void __init omap_init_irq(void)
        for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
                struct omap_irq_bank *bank = irq_banks + i;
 
-               if (cpu_is_omap24xx())
+               if (cpu_is_omap24xx()) {
                        bank->base_reg = IO_ADDRESS(OMAP24XX_IC_BASE);
-               else if (cpu_is_omap34xx())
+               }
+               if (cpu_is_omap34xx()) {
                        bank->base_reg = IO_ADDRESS(OMAP34XX_IC_BASE);
+               }
                omap_irq_bank_init_one(bank);
 
                nr_irqs += bank->nr_irqs;

diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 6facd962b48f083e9c2cf2c52e9900b85320c439..a747610af8e3eba339beb1f765c0697333e620bd 100644 (file)
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -15,6 +15,9 @@ config ARCH_OMAP1
 config ARCH_OMAP2
        bool "TI OMAP2"
 
+config ARCH_OMAP3
+       bool "TI OMAP3"
+
 endchoice
 
 comment "OMAP Feature Selections"
@@ -148,13 +151,13 @@ config OMAP_MPU_TIMER
 
 config OMAP_32K_TIMER
        bool "Use 32KHz timer"
-       depends on ARCH_OMAP16XX || ARCH_OMAP24XX
+       depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
        help
          Select this option if you want to enable the OMAP 32KHz timer.
          This timer saves power compared to the OMAP_MPU_TIMER, and has
          support for no tick during idle. The 32KHz timer provides less
          intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
-         currently only available for OMAP16XX and 24XX.
+         currently only available for OMAP16XX, 24XX and 34XX.
 
 endchoice
 
@@ -169,7 +172,7 @@ config OMAP_32K_TIMER_HZ
 
 config OMAP_DM_TIMER
        bool "Use dual-mode timer"
-       depends on ARCH_OMAP16XX || ARCH_OMAP24XX
+       depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
        help
         Select this option if you want to use OMAP Dual-Mode timers.
 

diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 3eb6f8ae6d1605e038a4c01d585a779262558faf..87077af2255baa6a58aca3c957efd4998eef945c 100644 (file)
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -218,7 +218,7 @@ static int __init omap_init_clocksource_32k(void)
        static char err[] __initdata = KERN_ERR
                        "%s: can't register clocksource!\n";
 
-       if (cpu_is_omap16xx() || cpu_is_omap24xx()) {
+       if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
                clocksource_32k.mult = clocksource_hz2mult(32768,
                                            clocksource_32k.shift);
 

diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index ba55f4f449c57c0d714aff971366f30e76a4de3e..0c0ecd7f9a94b81d5857de77d8f0df237a4fd4b0 100644 (file)
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -141,7 +141,7 @@ static void omap_init_i2c(void)
         * either don't wire up I2C, or chips that mux it differently...
         * it can include clocking and address info, maybe more.
         */
-       if (cpu_is_omap24xx()) {
+       if (cpu_class_is_omap2()) {
                if (machine_is_omap_h4()) {
                        omap_cfg_reg(M19_24XX_I2C1_SCL);
                        omap_cfg_reg(L15_24XX_I2C1_SDA);
@@ -164,7 +164,7 @@ static inline void omap_init_i2c(void) {}
 static void omap_init_kp(void)
 {
        /* REVISIT: 2430 keypad is on TWL4030 */
-       if (cpu_is_omap2430())
+       if (cpu_is_omap2430() || cpu_is_omap34xx())
                return;
 
        if (machine_is_omap_h2() || machine_is_omap_h3()) {
@@ -295,7 +295,7 @@ static void __init omap_init_mmc(void)
        const struct omap_mmc_conf      *mmc;
 
        /* REVISIT: 2430 has HS MMC */
-       if (cpu_is_omap2430())
+       if (cpu_is_omap2430() || cpu_is_omap34xx())
                return;
 
        /* NOTE:  assumes MMC was never (wrongly) enabled */
@@ -537,7 +537,7 @@ static int __init omap_init_devices(void)
        omap_init_uwire();
        omap_init_wdt();
        omap_init_rng();
-       if (!cpu_is_omap2430()) {
+       if (!cpu_is_omap2430() && !cpu_is_omap34xx()) {
                omap_init_i2c();
        }
        return 0;

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 3cd3d7f1465d34e7acf04f36409e52dfbc6097d7..0b823de36e4dab6cf660648e48dd91bda71214f7 100644 (file)
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -120,17 +120,29 @@
 #define OMAP24XX_GPIO_CLEARDATAOUT     0x0090
 #define OMAP24XX_GPIO_SETDATAOUT       0x0094
 
+/*
+ * omap34xx specific GPIO registers
+ */
+
+#define OMAP34XX_GPIO1_BASE            (void __iomem *)0x48310000
+#define OMAP34XX_GPIO2_BASE            (void __iomem *)0x49050000
+#define OMAP34XX_GPIO3_BASE            (void __iomem *)0x49052000
+#define OMAP34XX_GPIO4_BASE            (void __iomem *)0x49054000
+#define OMAP34XX_GPIO5_BASE            (void __iomem *)0x49056000
+#define OMAP34XX_GPIO6_BASE            (void __iomem *)0x49058000
+
+
 struct gpio_bank {
        void __iomem *base;
        u16 irq;
        u16 virtual_irq_start;
        int method;
        u32 reserved_map;
-#if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX)
+#if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        u32 suspend_wakeup;
        u32 saved_wakeup;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        u32 non_wakeup_gpios;
        u32 enabled_non_wakeup_gpios;
 
@@ -195,6 +207,18 @@ static struct gpio_bank gpio_bank_243x[5] = {
 
 #endif
 
+#ifdef CONFIG_ARCH_OMAP34XX
+static struct gpio_bank gpio_bank_34xx[6] = {
+       { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE,       METHOD_GPIO_24XX },
+       { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32,  METHOD_GPIO_24XX },
+       { OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64,  METHOD_GPIO_24XX },
+       { OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96,  METHOD_GPIO_24XX },
+       { OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
+       { OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX },
+};
+
+#endif
+
 static struct gpio_bank *gpio_bank;
 static int gpio_bank_count;
 
@@ -225,6 +249,10 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
        if (cpu_is_omap24xx())
                return &gpio_bank[gpio >> 5];
 #endif
+#ifdef CONFIG_ARCH_OMAP34XX
+       if (cpu_is_omap34xx())
+               return &gpio_bank[gpio >> 5];
+#endif
 }
 
 static inline int get_gpio_index(int gpio)
@@ -236,6 +264,10 @@ static inline int get_gpio_index(int gpio)
 #ifdef CONFIG_ARCH_OMAP24XX
        if (cpu_is_omap24xx())
                return gpio & 0x1f;
+#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+       if (cpu_is_omap34xx())
+               return gpio & 0x1f;
 #endif
        return gpio & 0x0f;
 }
@@ -266,6 +298,10 @@ static inline int gpio_valid(int gpio)
 #ifdef CONFIG_ARCH_OMAP24XX
        if (cpu_is_omap24xx() && gpio < 128)
                return 0;
+#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+       if (cpu_is_omap34xx() && gpio < 160)
+               return 0;
 #endif
        return -1;
 }
@@ -306,7 +342,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
                reg += OMAP730_GPIO_DIR_CONTROL;
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_OE;
                break;
@@ -380,7 +416,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
                        l &= ~(1 << gpio);
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                if (enable)
                        reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -438,7 +474,7 @@ int omap_get_gpio_datain(int gpio)
                reg += OMAP730_GPIO_DATA_INPUT;
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_DATAIN;
                break;
@@ -458,7 +494,7 @@ do {        \
        __raw_writel(l, base + reg); \
 } while(0)
 
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
 {
        void __iomem *base = bank->base;
@@ -587,7 +623,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
                        goto bad;
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                set_24xx_gpio_triggering(bank, gpio, trigger);
                break;
@@ -607,7 +643,7 @@ static int gpio_irq_type(unsigned irq, unsigned type)
        unsigned gpio;
        int retval;
 
-       if (!cpu_is_omap24xx() && irq > IH_MPUIO_BASE)
+       if (!(cpu_class_is_omap2()) && irq > IH_MPUIO_BASE)
                gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
        else
                gpio = irq - IH_GPIO_BASE;
@@ -619,7 +655,7 @@ static int gpio_irq_type(unsigned irq, unsigned type)
                return -EINVAL;
 
        /* OMAP1 allows only only edge triggering */
-       if (!cpu_is_omap24xx()
+       if (!(cpu_class_is_omap2())
                        && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
                return -EINVAL;
 
@@ -660,7 +696,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
                reg += OMAP730_GPIO_INT_STATUS;
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_IRQSTATUS1;
                break;
@@ -672,8 +708,10 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
        __raw_writel(gpio_mask, reg);
 
        /* Workaround for clearing DSP GPIO interrupts to allow retention */
-       if (cpu_is_omap2420())
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+       if (cpu_is_omap2420() || cpu_is_omap34xx())
                __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2);
+#endif
 }
 
 static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@ -716,7 +754,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
                inv = 1;
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                reg += OMAP24XX_GPIO_IRQENABLE1;
                mask = 0xffffffff;
@@ -779,7 +817,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
                        l |= gpio_mask;
                break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                if (enable)
                        reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@ -825,7 +863,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
                spin_unlock(&bank->lock);
                return 0;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        case METHOD_GPIO_24XX:
                if (bank->non_wakeup_gpios & (1 << gpio)) {
                        printk(KERN_ERR "Unable to modify wakeup on "
@@ -931,7 +969,7 @@ void omap_free_gpio(int gpio)
                __raw_writel(1 << get_gpio_index(gpio), reg);
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        if (bank->method == METHOD_GPIO_24XX) {
                /* Disable wake-up during idle for dynamic tick */
                void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
@@ -980,7 +1018,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
        if (bank->method == METHOD_GPIO_730)
                isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
        if (bank->method == METHOD_GPIO_24XX)
                isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
 #endif
@@ -994,7 +1032,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
                        isr &= 0x0000ffff;
 
-               if (cpu_is_omap24xx()) {
+               if (cpu_class_is_omap2()) {
                        level_mask =
                                __raw_readl(bank->base +
                                        OMAP24XX_GPIO_LEVELDETECT0) |
@@ -1063,7 +1101,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                        }
                }
 
-               if (cpu_is_omap24xx()) {
+               if (cpu_class_is_omap2()) {
                        /* clear level sensitive interrupts after handler(s) */
                        _enable_gpio_irqbank(bank, isr_saved & level_mask, 0);
                        _clear_gpio_irqbank(bank, isr_saved & level_mask);
@@ -1242,7 +1280,7 @@ static int initialized;
 static struct clk * gpio_ick;
 static struct clk * gpio_fck;
 
-#ifdef CONFIG_ARCH_OMAP2430
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
 static struct clk * gpio5_ick;
 static struct clk * gpio5_fck;
 #endif
@@ -1261,7 +1299,7 @@ static int __init _omap_gpio_init(void)
                else
                        clk_enable(gpio_ick);
        }
-       if (cpu_is_omap24xx()) {
+       if (cpu_class_is_omap2()) {
                gpio_ick = clk_get(NULL, "gpios_ick");
                if (IS_ERR(gpio_ick))
                        printk("Could not get gpios_ick\n");
@@ -1274,10 +1312,10 @@ static int __init _omap_gpio_init(void)
                        clk_enable(gpio_fck);
 
                /*
-                * On 2430 GPIO 5 uses CORE L4 ICLK
+                * On 2430 & 3430 GPIO 5 uses CORE L4 ICLK
                 */
-#ifdef CONFIG_ARCH_OMAP2430
-               if (cpu_is_omap2430()) {
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
+               if (cpu_is_omap2430() || cpu_is_omap3430()) {
                        gpio5_ick = clk_get(NULL, "gpio5_ick");
                        if (IS_ERR(gpio5_ick))
                                printk("Could not get gpio5_ick\n");
@@ -1290,7 +1328,7 @@ static int __init _omap_gpio_init(void)
                                clk_enable(gpio5_fck);
                }
 #endif
-}
+       }
 
 #ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap15xx()) {
@@ -1337,6 +1375,17 @@ static int __init _omap_gpio_init(void)
                printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n",
                        (rev >> 4) & 0x0f, rev & 0x0f);
        }
+#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+       if (cpu_is_omap34xx()) {
+               int rev;
+
+               gpio_bank_count = 6;
+               gpio_bank = gpio_bank_34xx;
+               rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
+               printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n",
+                       (rev >> 4) & 0x0f, rev & 0x0f);
+       }
 #endif
        for (i = 0; i < gpio_bank_count; i++) {
                int j, gpio_count = 16;
@@ -1368,7 +1417,7 @@ static int __init _omap_gpio_init(void)
                        gpio_count = 32; /* 730 has 32-bit GPIOs */
                }
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                if (bank->method == METHOD_GPIO_24XX) {
                        static const u32 non_wakeup_gpios[] = {
                                0xe203ffc0, 0x08700040
@@ -1404,21 +1453,23 @@ static int __init _omap_gpio_init(void)
        if (cpu_is_omap16xx())
                omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL);
 
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX)
        /* Enable autoidle for the OCP interface */
        if (cpu_is_omap24xx())
                omap_writel(1 << 0, 0x48019010);
+#elif defined(CONFIG_ARCH_OMAP34XX)
+       if (cpu_is_omap34xx())
+               omap_writel(1 << 0, 0x48306814);
 #endif
-
        return 0;
 }
 
-#if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX)
+#if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX) || defined (CONFIG_ARCH_OMAP34XX)
 static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
 {
        int i;
 
-       if (!cpu_is_omap24xx() && !cpu_is_omap16xx())
+       if ((!cpu_class_is_omap2()) && (!cpu_is_omap16xx()))
                return 0;
 
        for (i = 0; i < gpio_bank_count; i++) {
@@ -1435,7 +1486,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
                        wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
                        break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                case METHOD_GPIO_24XX:
                        wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA;
                        wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
@@ -1475,7 +1526,7 @@ static int omap_gpio_resume(struct sys_device *dev)
                        wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
                        break;
 #endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                case METHOD_GPIO_24XX:
                        wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
                        wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
@@ -1507,7 +1558,7 @@ static struct sys_device omap_gpio_device = {
 
 #endif
 
-#ifdef CONFIG_ARCH_OMAP24XX
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 
 static int workaround_enabled;
 
@@ -1523,15 +1574,19 @@ void omap2_gpio_prepare_for_retention(void)
 
                if (!(bank->enabled_non_wakeup_gpios))
                        continue;
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
                l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
                l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+#endif
                bank->saved_fallingdetect = l1;
                bank->saved_risingdetect = l2;
                l1 &= ~bank->enabled_non_wakeup_gpios;
                l2 &= ~bank->enabled_non_wakeup_gpios;
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
                __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
+#endif
                c++;
        }
        if (!c) {
@@ -1553,26 +1608,31 @@ void omap2_gpio_resume_after_retention(void)
 
                if (!(bank->enabled_non_wakeup_gpios))
                        continue;
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                __raw_writel(bank->saved_fallingdetect,
                                 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
                __raw_writel(bank->saved_risingdetect,
                                 bank->base + OMAP24XX_GPIO_RISINGDETECT);
+#endif
                /* Check if any of the non-wakeup interrupt GPIOs have changed
                 * state.  If so, generate an IRQ by software.  This is
                 * horribly racy, but it's the best we can do to work around
                 * this silicon bug. */
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
+#endif
                l ^= bank->saved_datain;
                l &= bank->non_wakeup_gpios;
                if (l) {
                        u32 old0, old1;
-
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                        old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                        old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
                        __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                        __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
                        __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                        __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+#endif
                }
        }
 
@@ -1601,8 +1661,8 @@ static int __init omap_gpio_sysinit(void)
 
        mpuio_init();
 
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX)
-       if (cpu_is_omap16xx() || cpu_is_omap24xx()) {
+#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+       if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
                if (ret == 0) {
                        ret = sysdev_class_register(&omap_gpio_sysclass);
                        if (ret == 0)
@@ -1664,7 +1724,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
 
                if (bank_is_mpuio(bank))
                        gpio = OMAP_MPUIO(0);
-               else if (cpu_is_omap24xx() || cpu_is_omap730())
+               else if (cpu_class_is_omap2() || cpu_is_omap730())
                        bankwidth = 32;
 
                for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {

diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 1f23f0459e5f68dd4c4f363cae87c8ab5f919b5f..e3a85b9ff2031d52ca6daa5a8151962dbccd896b 100644 (file)
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -31,7 +31,7 @@
 #define OMAP2_SRAM_VA          0xd0000000
 #define OMAP2_SRAM_PUB_VA      0xd0000800
 
-#if defined(CONFIG_ARCH_OMAP24XX)
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 #define SRAM_BOOTLOADER_SZ     0x00
 #else
 #define SRAM_BOOTLOADER_SZ     0x80
@@ -92,7 +92,7 @@ void __init omap_detect_sram(void)
 {
        unsigned long reserved;
 
-       if (cpu_is_omap24xx()) {
+       if (cpu_class_is_omap2()) {
                if (is_sram_locked()) {
                        omap_sram_base = OMAP2_SRAM_PUB_VA;
                        omap_sram_start = OMAP2_SRAM_PUB_PA;
@@ -102,7 +102,7 @@ void __init omap_detect_sram(void)
                        omap_sram_start = OMAP2_SRAM_PA;
                        if (cpu_is_omap242x())
                                omap_sram_size = 0xa0000; /* 640K */
-                       else if (cpu_is_omap243x())
+                       else if (cpu_is_omap243x() || cpu_is_omap34xx())
                                omap_sram_size = 0x10000; /* 64K */
                }
        } else {
@@ -149,7 +149,7 @@ void __init omap_map_sram(void)
        if (omap_sram_size == 0)
                return;
 
-       if (cpu_is_omap24xx()) {
+       if (cpu_class_is_omap2()) {
                omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
 
                base = OMAP2_SRAM_PA;
@@ -224,7 +224,7 @@ int __init omap1_sram_init(void)
 #define omap1_sram_init()      do {} while (0)
 #endif
 
-#ifdef CONFIG_ARCH_OMAP2
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 
 static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
                              u32 base_cs, u32 force_unlock);
@@ -279,7 +279,7 @@ int __init omap_sram_init(void)
        omap_detect_sram();
        omap_map_sram();
 
-       if (!cpu_is_omap24xx())
+       if (!(cpu_class_is_omap2()))
                omap1_sram_init();
        else
                omap2_sram_init();

diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c
index 59785f46bf6784a973a7f787dcfaedf530324dcd..83f48e7c186a59745f3232add989e90eb645faf4 100644 (file)
--- a/arch/arm/plat-omap/timer32k.c
+++ b/arch/arm/plat-omap/timer32k.c
@@ -72,6 +72,8 @@ struct sys_timer omap_timer;
 #define TIMER_32K_SYNCHRONIZED         0xfffbc410
 #elif defined(CONFIG_ARCH_OMAP24XX)
 #define TIMER_32K_SYNCHRONIZED         (OMAP2_32KSYNCT_BASE + 0x10)
+#elif defined(CONFIG_ARCH_OMAP34XX)
+#define TIMER_32K_SYNCHRONIZED         0x48320010
 #else
 #error OMAP 32KHz timer does not currently work on 15XX!
 #endif
@@ -120,7 +122,7 @@ static inline void omap_32k_timer_stop(void)
 
 #define omap_32k_timer_ack_irq()
 
-#elif defined(CONFIG_ARCH_OMAP2)
+#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 
 static struct omap_dm_timer *gptimer;
 
@@ -223,9 +225,9 @@ static __init void omap_init_32k_timer(void)
        if (cpu_class_is_omap1())
                setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
 
-#ifdef CONFIG_ARCH_OMAP2
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
        /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */
-       if (cpu_is_omap24xx()) {
+       if (cpu_class_is_omap2()) {
                gptimer = omap_dm_timer_request_specific(1);
                BUG_ON(gptimer == NULL);