]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
[ARM] OMAP: wait for pwrdm transition after clk_enable()
authorTomi Valkeinen <tomi.valkeinen@nokia.com>
Wed, 28 Jan 2009 02:44:31 +0000 (19:44 -0700)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 8 Feb 2009 17:50:31 +0000 (17:50 +0000)
Enabling clock in a disabled power domain causes the power domain to be
turned on. However, the power transition is not always finished when
clk_enable() returns and this randomly crashes the kernel when an
interrupt happens right after the clk_enable, and the kernel tries to
read the irq status register for that domain.

Why the irq status register is inaccessible, I don't know. Also it
doesn't seem to be related to the module being not powered up, but to
the transition itself.

The same could perhaps happen after clk_disable also, but I have not
witnessed that.

The problem affects at least dss, cam and sgx clocks.

This change waits for the transition to be finished before returning
from omap2_clkdm_clk_enable().

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-omap2/clockdomain.c

index e9b4f6c564e44f58dc461cb71fb87f967f574db6..c9c367c39679783f55cd919cc271c8bb6252d6e3 100644 (file)
@@ -568,6 +568,8 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
        else
                omap2_clkdm_wakeup(clkdm);
 
+       pwrdm_wait_transition(clkdm->pwrdm.ptr);
+
        return 0;
 }