]> pilppa.com Git - linux-2.6-omap-h63xx.git/commitdiff
OMAP2 SDRC: add timing data for Micron MT46H32M32LF-6
authorPaul Walmsley <paul@pwsan.com>
Tue, 8 Jul 2008 02:54:59 +0000 (20:54 -0600)
committerTony Lindgren <tony@atomide.com>
Tue, 5 Aug 2008 12:07:46 +0000 (15:07 +0300)
Add timing data for the Micron MT46H32M32LF-6 SDRAM chip, used on the
OMAP3 Beagle and EVM boards.  Original timing data is from the Micron
datasheet PDF downloaded from:

http://download.micron.com/pdf/datasheets/dram/mobile/1gb_ddr_mobile_sdram_t48m.pdf

Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying
the chips used on Beagle & OMAP3EVM.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/board-omap3beagle.c
arch/arm/mach-omap2/board-omap3evm.c
arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h [new file with mode: 0644]
include/asm-arm/arch-omap/sdrc.h

index eeadf2b3058465ab5923a7666b487de2414b22a2..307cbf84de4aabbe4175f836eed2cd677d84ec4e 100644 (file)
@@ -95,6 +95,8 @@ static struct platform_device omap3beagle_nand_device = {
        .resource       = &omap3beagle_nand_resource,
 };
 
+#include "sdram-micron-mt46h32m32lf-6.h"
+
 static struct omap_uart_config omap3_beagle_uart_config __initdata = {
        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
 };
@@ -111,7 +113,7 @@ static int __init omap3_beagle_i2c_init(void)
 
 static void __init omap3_beagle_init_irq(void)
 {
-       omap2_init_common_hw(NULL);
+       omap2_init_common_hw(mt46h32m32lf6_sdrc_params);
        omap_init_irq();
        omap_gpio_init();
 }
index 1ba8a45473209a038a54b4b5ccdd007cf8217508..df81706d26856e8f9842ac66d288b9afd85012f0 100644 (file)
@@ -37,6 +37,8 @@
 #include <asm/arch/common.h>
 #include <asm/arch/mcspi.h>
 
+#include "sdram-micron-mt46h32m32lf-6.h"
+
 static struct resource omap3evm_smc911x_resources[] = {
        [0] =   {
                .start  = OMAP3EVM_ETHR_START,
@@ -188,7 +190,7 @@ static struct platform_device omap3evm_kp_device = {
 
 static void __init omap3_evm_init_irq(void)
 {
-       omap2_init_common_hw(NULL);
+       omap2_init_common_hw(mt46h32m32lf6_sdrc_params);
        omap_init_irq();
        omap_gpio_init();
        omap3evm_init_smc911x();
diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
new file mode 100644 (file)
index 0000000..f0ec104
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * SDRC register values for the Micron MT46H32M32LF-6
+ *
+ * Copyright (C) 2008 Texas Instruments, Inc.
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
+#define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
+
+#include <asm/arch/sdrc.h>
+
+/* Micron MT46H32M32LF-6 */
+/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */
+static struct omap_sdrc_params mt46h32m32lf_sdrc_params[] = {
+       [0] = {
+               .rate        = 165941176,
+               .actim_ctrla = 0x9a9db4c6,
+               .actim_ctrlb = 0x00011217,
+               .rfr_ctrl    = 0x0004dc01,
+               .mr          = 0x00000032,
+       },
+       [1] = {
+               .rate        = 133333333,
+               .actim_ctrla = 0x7a19b485,
+               .actim_ctrlb = 0x00011213,
+               .rfr_ctrl    = 0x0003de01,
+               .mr          = 0x00000032,
+       },
+       [2] = {
+               .rate        = 82970588,
+               .actim_ctrla = 0x51512283,
+               .actim_ctrlb = 0x0001120c,
+               .rfr_ctrl    = 0x00025501,
+               .mr          = 0x00000032,
+       },
+       [3] = {
+               .rate        = 66666666,
+               .actim_ctrla = 0x410d2243,
+               .actim_ctrlb = 0x0001120a,
+               .rfr_ctrl    = 0x0001d601,
+               .mr          = 0x00000032,
+       },
+       [4] = {
+               .rate        = 0
+       },
+};
+
+#endif
index 00ba5395b26babdb89146361a0bec6b8e5cbda98..1d974a08fc3dc1da4bc808b374e1cd5f69053ea4 100644 (file)
@@ -102,7 +102,7 @@ struct omap_sdrc_params {
        u32 mr;
 };
 
-void __init omap2_sdrc_init(void);
+void __init omap2_sdrc_init(struct omap_sdrc_params *);
 struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r);
 
 #ifdef CONFIG_ARCH_OMAP2