[ARM] OMAP34XX: Add miscellaneous definitions related to 34xx

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index aaf68a59800e2e20496e43191742a49800311f1f..844356cc75bd561b562ff4cff1dd3f3adf77d86d 100644 (file)
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -208,6 +208,10 @@
 #define OMAP3430ES2_ST_USBTLL_MASK                     (1 << 2)
 
 /* CM_AUTOIDLE1_CORE */
+#define OMAP3430ES2_AUTO_MMC3                          (1 << 30)
+#define OMAP3430ES2_AUTO_MMC3_SHIFT                    30
+#define OMAP3430ES2_AUTO_ICR                           (1 << 29)
+#define OMAP3430ES2_AUTO_ICR_SHIFT                     29
 #define OMAP3430_AUTO_AES2                             (1 << 28)
 #define OMAP3430_AUTO_AES2_SHIFT                       28
 #define OMAP3430_AUTO_SHA12                            (1 << 27)
@@ -276,6 +280,9 @@
 #define OMAP3430_AUTO_DES1_SHIFT                       0
 
 /* CM_AUTOIDLE3_CORE */
+#define        OMAP3430ES2_AUTO_USBHOST                        (1 << 0)
+#define        OMAP3430ES2_AUTO_USBHOST_SHIFT                  0
+#define        OMAP3430ES2_AUTO_USBTLL                         (1 << 2)
 #define OMAP3430ES2_AUTO_USBTLL_SHIFT                  2
 #define OMAP3430ES2_AUTO_USBTLL_MASK                   (1 << 2)
 

diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 5b5ecfe6c99916847b88b50db7235f3b8c51fedc..c6a7940f42870cab6d613c2194a5713dacef5def 100644 (file)
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -366,6 +366,7 @@
 
 /* PM_WKEN_WKUP specific bits */
 #define OMAP3430_EN_IO                                 (1 << 8)
+#define OMAP3430_EN_GPIO1                              (1 << 3)
 
 /* PM_MPUGRPSEL_WKUP specific bits */
 
@@ -452,6 +453,14 @@
 #define OMAP3430_CMDRA0_MASK                           (0xff << 0)
 
 /* PRM_VC_CMD_VAL_0 specific bits */
+#define OMAP3430_VC_CMD_ON_SHIFT                       24
+#define OMAP3430_VC_CMD_ON_MASK                                (0xFF << 24)
+#define OMAP3430_VC_CMD_ONLP_SHIFT                     16
+#define OMAP3430_VC_CMD_ONLP_MASK                      (0xFF << 16)
+#define OMAP3430_VC_CMD_RET_SHIFT                      8
+#define OMAP3430_VC_CMD_RET_MASK                       (0xFF << 8)
+#define OMAP3430_VC_CMD_OFF_SHIFT                      0
+#define OMAP3430_VC_CMD_OFF_MASK                       (0xFF << 0)
 
 /* PRM_VC_CMD_VAL_1 specific bits */
 

diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index e4dc4b17881d2e9cbc198aefb7bf148ac4e50688..826d326b8062d2e2177f0fbfdb3c72e25a88c324 100644 (file)
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -141,6 +141,19 @@
 #define PM_PWSTCTRL                                    0x00e0
 #define PM_PWSTST                                      0x00e4
 
+/* Omap2 specific registers */
+#define OMAP24XX_PM_WKEN2                              0x00a4
+#define OMAP24XX_PM_WKST2                              0x00b4
+
+#define OMAP24XX_PRCM_IRQSTATUS_DSP                    0x00f0  /* IVA mod */
+#define OMAP24XX_PRCM_IRQENABLE_DSP                    0x00f4  /* IVA mod */
+#define OMAP24XX_PRCM_IRQSTATUS_IVA                    0x00f8
+#define OMAP24XX_PRCM_IRQENABLE_IVA                    0x00fc
+
+/* Omap3 specific registers */
+#define OMAP3430ES2_PM_WKEN3                           0x00f0
+#define OMAP3430ES2_PM_WKST3                           0x00b8
+
 #define OMAP3430_PM_MPUGRPSEL                          0x00a4
 #define OMAP3430_PM_MPUGRPSEL1                         OMAP3430_PM_MPUGRPSEL
 
@@ -153,16 +166,6 @@
 #define OMAP3430_PRM_IRQENABLE_IVA2                    0x00fc
 
 
-/* Architecture-specific registers */
-
-#define OMAP24XX_PM_WKEN2                              0x00a4
-#define OMAP24XX_PM_WKST2                              0x00b4
-
-#define OMAP24XX_PRCM_IRQSTATUS_DSP                    0x00f0  /* IVA mod */
-#define OMAP24XX_PRCM_IRQENABLE_DSP                    0x00f4  /* IVA mod */
-#define OMAP24XX_PRCM_IRQSTATUS_IVA                    0x00f8
-#define OMAP24XX_PRCM_IRQENABLE_IVA                    0x00fc
-
 #ifndef __ASSEMBLER__
 
 /* Power/reset management domain register get/set */
@@ -228,7 +231,6 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 #define OMAP_RSTTIME1_SHIFT                            0
 #define OMAP_RSTTIME1_MASK                             (0xff << 0)
 
-
 /* PRM_RSTCTRL */
 /* Named RM_RSTCTRL_WKUP on the 24xx */
 /* 2420 calls RST_DPLL3 'RST_DPLL' */