]> pilppa.com Git - linux-2.6-omap-h63xx.git/commit
[ARM] pxa: use new pin configuration mechanism for mainstone
authoreric miao <eric.miao@marvell.com>
Mon, 4 Feb 2008 09:15:50 +0000 (17:15 +0800)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 19 Apr 2008 10:29:05 +0000 (11:29 +0100)
commitfef06d274feb9b0e5a2d20c29b2979634514243f
treeb85fa0ac5f5f2d4d99da51e74c7a650a6ca07db7
parent3d3934c357103504d0f0a5e9ab808bb57e356f6a
[ARM] pxa: use new pin configuration mechanism for mainstone

1. the following code to configure PGSRx is no way portable and
   intuitive:

- PGSR0 = 0x00008800;
-       PGSR1 = 0x00000002;
-       PGSR2 = 0x0001FC00;
-       PGSR3 = 0x00001F81;

   this is removed as low power state has already been encoded in
   the pin configuration definitions.

   Note: there is no specific reason for some of the GPIOs to drive
   high in low power mode as indicated by the above setting, those
   bits are ignored, and the result is validated to work.

2. the following code to configure GPIO wakeup is removed as this
   is now totally handled by pxa2xx_mfp_config():

-       PWER  = 0xC0000002;
-       PRER  = 0x00000002;
-       PFER  = 0x00000002;

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-pxa/mainstone.c