]> pilppa.com Git - linux-2.6-omap-h63xx.git/commit
x86: don't disable TSC in any C states on AMD Fam10h
authorAndi Kleen <ak@suse.de>
Wed, 30 Jan 2008 12:32:41 +0000 (13:32 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 30 Jan 2008 12:32:41 +0000 (13:32 +0100)
commitddb25f9ac1c4b4f9ba0bdacd7850a921a0c6886c
tree285a144b79d8d17a35c7cd22ab1adb2ef6bdd0e8
parent32c7553f824d0d76771404f0e11d6059f82e8de7
x86: don't disable TSC in any C states on AMD Fam10h

The ACPI code currently disables TSC use in any C2 and C3
states. But the AMD Fam10h BKDG documents that the TSC
will never stop in any C states when the CONSTANT_TSC bit is
set. Make this disabling conditional on CONSTANT_TSC
not set on AMD.

I actually think this is true on Intel too for C2 states
on CPUs with p-state invariant TSC, but this needs
further discussions with Len to really confirm :-)

So far it is only enabled on AMD.

Cc: lenb@kernel.org
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
drivers/acpi/processor_idle.c