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igb: fix tx data corruption with transition to L0s on 82575
authorAlexander Duyck <alexander.h.duyck@intel.com>
Fri, 17 Oct 2008 04:26:57 +0000 (21:26 -0700)
committerJeff Garzik <jgarzik@redhat.com>
Wed, 22 Oct 2008 10:53:59 +0000 (06:53 -0400)
commitc54106bb3856a7726a814d54aa0eb32f5419a743
tree717fb190cc5782f5aa9f9dee5e80267f9a5f0380tree | snapshot
parentd4f12daf7ba4efc506c377a9591ecdb692641fe5commit | diff
igb: fix tx data corruption with transition to L0s on 82575

The 82575 has an issue in which the DMA will go out of sync if the link
partner goes into an L0s state.  To prevent this we set the pci-e link
partner capability bits to disable the L0s transition on the hw.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
drivers/net/igb/igb_main.c diff | blob | history
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