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(parent: 88b5d9b) | patch
OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck
authorPaul Walmsley <paul@pwsan.com>
Thu, 18 Sep 2008 16:30:31 +0000 (10:30 -0600)
committerTony Lindgren <tony@atomide.com>
Mon, 22 Sep 2008 14:45:06 +0000 (17:45 +0300)
commit9c909ac90902a9c0ecca2bc9ac36289cb84990f5
tree76b72e3b9ea57cc583c34eb16a8c1c5d629ac4c5tree | snapshot
parent88b5d9b6872be2d944895ca0f6c236f262e4e8d3commit | diff
OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck

This patch causes a DPLL to enter bypass when it is instructed to set
its rate to that of its bypass clock.  Previously this was only possible
after setting the DPLL rate, then disabling and re-enabling it.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clock34xx.c diff | blob | history
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