]> pilppa.com Git - linux-2.6-omap-h63xx.git/commit
ACPI: Processor native C-states using MWAIT
authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Mon, 25 Sep 2006 23:28:13 +0000 (16:28 -0700)
committerLen Brown <len.brown@intel.com>
Sat, 14 Oct 2006 04:35:39 +0000 (00:35 -0400)
commit991528d7348667924176f3e29addea0675298944
treeed8552bd4c696700a95ae37b26c4197923207ae7
parentb4bd8c66435a8cdf8c90334fb3b517a23ff2ab95
ACPI: Processor native C-states using MWAIT

Intel processors starting with the Core Duo support
support processor native C-state using the MWAIT instruction.
Refer: Intel Architecture Software Developer's Manual
http://www.intel.com/design/Pentium4/manuals/253668.htm

Platform firmware exports the support for Native C-state to OS using
ACPI _PDC and _CST methods.
Refer: Intel Processor Vendor-Specific ACPI: Interface Specification
http://www.intel.com/technology/iapc/acpi/downloads/302223.htm

With Processor Native C-state, we use 'MWAIT' instruction on the processor
to enter different C-states (C1, C2, C3).  We won't use the special IO
ports to enter C-state and no SMM mode etc required to enter C-state.
Overall this will mean better C-state support.

One major advantage of using MWAIT for all C-states is, with this and
"treat interrupt as break event" feature of MWAIT, we can now get accurate
timing for the time spent in C1, C2, ..  states.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Len Brown <len.brown@intel.com>
arch/i386/kernel/acpi/cstate.c
arch/i386/kernel/process.c
arch/x86_64/kernel/process.c
drivers/acpi/processor_idle.c
include/acpi/pdc_intel.h
include/acpi/processor.h
include/asm-i386/processor.h
include/asm-x86_64/processor.h